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STM8S103F2 数据表(PDF) 39 Page - STMicroelectronics |
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STM8S103F2 数据表(HTML) 39 Page - STMicroelectronics |
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39 / 121 page  DocID15441 Rev 14 39/121 STM8S103F2 STM8S103F3 STM8S103K3 Memory and register map 49 0x00 5340 TIM4 TIM4_CR1 TIM4 control register 1 0x00 0x00 5341 Reserved 0x00 5342 Reserved 0x00 5343 TIM4_IER TIM4 interrupt enable register 0x00 0x00 5344 TIM4_SR TIM4 status register 0x00 0x00 5345 TIM4_EGR TIM4 event generation register 0x00 0x00 5346 TIM4_CNTR TIM4 counter 0x00 0x00 5347 TIM4_PSCR TIM4 prescaler register 0x00 0x00 5348 TIM4_ARR TIM4 auto-reload register 0xFF 0x00 5349 to 0x00 53DF Reserved area (153 byte) 0x00 53E0 to 0x00 53F3 ADC1 ADC_DBxR ADC data buffer registers 0x00 0x00 53F4 to 0x00 53FF Reserved area (12 byte) Table 8. General hardware register map (continued) Address Block Register label Register name Reset status |
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