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STM8S103F2 数据表(PDF) 40 Page - STMicroelectronics |
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STM8S103F2 数据表(HTML) 40 Page - STMicroelectronics |
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40 / 121 page ![]() Memory and register map STM8S103F2 STM8S103F3 STM8S103K3 40/121 DocID15441 Rev 14 0x00 5400 ADC1 cont’d ADC_CSR ADC control/status register 0x00 0x00 5401 ADC_CR1 ADC configuration register 1 0x00 0x00 5402 ADC_CR2 ADC configuration register 2 0x00 0x00 5403 ADC_CR3 ADC configuration register 3 0x00 0x00 5404 ADC_DRH ADC data register high 0xXX 0x00 5405 ADC_DRL ADC data register low 0xXX 0x00 5406 ADC_TDRH ADC Schmitt trigger disable register high 0x00 0x00 5407 ADC_TDRL ADC Schmitt trigger disable register low 0x00 0x00 5408 ADC_HTRH ADC high threshold register high 0x03 0x00 5409 ADC_HTRL ADC high threshold register low 0xFF 0x00 540A ADC_LTRH ADC low threshold register high 0x00 0x00 540B ADC_LTRL ADC low threshold register low 0x00 0x00 540C ADC_AWSRH ADC analog watchdog status register high 0x00 0x00 540D ADC_AWSRL ADC analog watchdog status register low 0x00 0x00 540E ADC _AWCRH ADC analog watchdog control register high 0x00 0x00 540F ADC_AWCRL ADC analog watchdog control register low 0x00 0x00 5410 to 0x00 57FF Reserved area (1008 byte) 1. Depends on the previous reset source. 2. Write-only register. Table 8. General hardware register map (continued) Address Block Register label Register name Reset status |
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