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ADE1202 数据表(PDF) 19 Page - Analog Devices

部件名 ADE1202
功能描述  Dual Channel, Configurable, Isolated Digital Input
PDF  42 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADE1202 数据表(HTML) 19 Page - Analog Devices

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Data Sheet
ADE1202
Rev. 0 | Page 19 of 42
Comparator in GT Mode
In GT mode, when the ADC output is greater than the high
threshold level, the comparator output is set high. The
comparator output is set low when the ADC output drops
below the high threshold level. The behavior of the comparator
in GT output mode is shown in Figure 30.
TIME
HIGH THRESHOLD
LEVEL
ADC
OUTPUT
COMPARATOR
OUTPUT
TIME
Figure 30. Comparator Behavior in GT Output Mode
Comparator in LT Mode
In LT mode, when the ADC output is lower than or equal to the
high threshold level, the comparator output is set high. The
comparator output is set low when the ADC output is greater
than the high threshold level. The behavior of the comparator in
LT output mode is shown in Figure 31.
TIME
HIGH THRESHOLD
LEVEL
ADC
OUTPUT
COMPARATOR
OUTPUT
TIME
Figure 31. Comparator Behavior in LT Output Mode
Debounce Function
A debounce filter follows the comparator in each datapath.
Each debounce filter consists of a counter that increments every
20 µs. The maximum debounce time is 163.82 ms. A filter
length of 0 means the debounce filter is bypassed. To calculate
the filter length, use the following equation:
Filter Length = (Debounce Time/Channel Update)
where:
Filter Length is the value that is written in the BIN_FILTER_VAL,
WARNA_FILTER_VAL, WARNB_FILTER_VAL, and
WARNC_FILTER_VAL bit fields.
Debounce Time is the desired length of the filter expressed in µs.
Channel Update is 20 µs.
The debounce filter can function in two modes, managed by
Bit 14 of the BIN_FILTER, WARNA_FILTER, WARNB_FILTER,
and WARNC_FILTER registers. If Bit 14 is 0 (the default value)
the filter is in up/clear mode. If Bit 14 is 1, the filter is in
up/down mode.
Debounce Function Up/Clear Mode
In up/clear mode, the filter counter increments while the
comparator output is high until the counter reaches the filter
length. If the comparator output goes low before the filter
length has been reached, the counter is cleared.
When the filter length has been reached, the filter output goes
high. The counter stops incrementing when the comparator
output is high. The counter is decremented when the comparator
output goes low. When the counter decrements to 0, the filter
output goes low. If the comparator output goes from low to high
before the counter decrements to 0, the counter is reset to the
filter length.
Debounce Function Up/Down Mode
In up/down mode, the filter counter increments while the
comparator output is high until the counter reaches the filter
length. If the comparator output is low, the counter is decremented.
When the filter length has been reached, the filter output goes
high. The counter stops incrementing when the comparator
output is high. When the comparator output is low, the counter
is decremented. When the counter decrements to 0, the filter
output goes low.
See Figure 32 for an example of the debounce filter working in
up/down mode and up/clear mode.
The output of the debounce filter can be read through the SPI
in the corresponding DOUTx, WARNAx, WARNBx, and
WARNCx bits in the STATUS register, and the DOUT1 filter
output represents the status for the IN1 filter output, and the
DOUT2 filter output represents the status of the DOUT2
debounce filter output.
The status of the DOUT1 and DOUT2 filter outputs is reflected
on the DOUT1 pin and the DOUT2/IRQ pin based on the
setting of the IRQ_PIN_MODE bit (Bit 2) in the CTRL register.
The debounce filter outputs can be configured to trigger an
interrupt on the DOUT2/IRQ pin (see the Interrupt section).



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