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ADP1850ACPZ-R7 数据表(PDF) 16 Page - Analog Devices

部件名 ADP1850ACPZ-R7
功能描述  Wide Range Input, Dual/Two-Phase, DC-to-DC Synchronous Buck Controller
PDF  32 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADP1850ACPZ-R7 数据表(HTML) 16 Page - Analog Devices

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ADP1850
Data Sheet
Rev. C | Page 16 of 32
APPLICATIONS INFORMATION
SETTING THE OUTPUT VOLTAGE
The output voltage is set using a resistive voltage divider from
the output to FB. The voltage divider divides down the output
voltage to the 0.6 V FB regulation voltage to set the regulation
output voltage. The output voltage can be set to as low as 0.6 V
and as high as 90% of the power input voltage.
The maximum input bias current into FB is 100 nA. For a 0.15%
degradation in regulation voltage and with 100 nA bias current,
the low-side resistor, RBOT, must be less than 9 kΩ, which results
in 67 µA of divider current. For RBOT, use a 1 kΩ to 20 kΩ resistor.
A larger value resistor can be used but results in a reduction in
output voltage accuracy due to the input bias current at the FBx
pin, while lower values cause increased quiescent current
consumption. Choose RTOP to set the output voltage by using
the following equation:


=
FB
FB
OUT
BOT
TOP
V
V
V
R
R
where:
RTOP is the high-side voltage divider resistance.
RBOT is the low-side voltage divider resistance.
VOUT is the regulated output voltage.
VFB is the feedback regulation threshold, 0.6 V.
The minimum output voltage is dependent on fSW and minimum
DH on time. The maximum output voltage is dependent on fSW,
the minimum DH off time, and the IR drop across the high-side
NMOSFET and the DCR of the inductor. For example, with fSW of
600 kHz (or 1.67 µs) and a minimum on time of 130 ns, the
minimum duty cycle is approximately 7.8% (130 ns/1.67 µs). If
VIN is 12 V and the duty cycle is 7.8%, then the lowest output is
0.94 V. As an example for the maximum output voltage, if VIN is
5 V, fSW is 600 kHz, and the minimum DH off time is 395 ns
(335 ns DH off time plus approximately 60 ns total dead time),
then the maximum duty cycle is 76%. Therefore, the maximum
output is approximately 3.8 V. If the IR drop across the high-
side NMOSFET and the DCR of the inductor is 0.5 V, then the
absolute maximum output is 4.5 V (5 V − 0.5 V), independent of
fSW and duty cycle.
SOFT START
The soft start period is set by an external capacitor between
SS1/SS2 and AGND. The soft start function limits the input
inrush current and prevents output overshoot.
When EN1/EN2 is enabled, a current source of 6.5 µA starts
charging the capacitor, and the regulation voltage is reached
when the voltage at SS1/SS2 reaches 0.6 V.
The soft start period is approximated by
SS
SS
C
t
μA
5
.
6
V
6
.
0
=
The SSx pin reaches a final voltage equal to VCCO. If the output
voltage is precharged prior to turn-on, the ADP1850 prevents
reverse inductor current, which discharges the output capacitor.
Once the voltage at SSx exceeds the regulation voltage (typically
0.6 V), the reverse current is reenabled to allow the output
voltage regulation to be independent of load current.
Furthermore, in dual-phase operation, where SS1 is shorted to
SS2, the current source is doubled to 13 µA during the soft start
sequence.
When a controller is disabled, for instance, EN1/EN2 is pulled
low or experiences an overcurrent limit condition, the soft start
capacitor is discharged through an internal 3 kΩ pull-down
resistor.
SETTING THE CURRENT LIMIT
The current limit comparator measures the voltage across the
low-side MOSFET to determine the load current.
The current limit is set by an external current limit resistor,
RILIM, between ILIMx and SWx. The current sense pin, ILIMx,
sources nominally 50 μA to this external resistor. This creates an
offset voltage of RILIM multiplied by 50 μA. When the drop
across the low-side MOSFET, RDSON, is equal to or greater than
this offset voltage, the ADP1850 flags a current limit event.
Because the ILIMx current and the MOSFET, RDSON, vary over
process and temperature, the minimum current limit should be
set to ensure that the system can handle the maximum desired
load current. To do this, use the peak current in the inductor,
which is the desired output current limit level plus ½ of the
ripple current, the maximum RDSON of the MOSFET at its
highest expected temperature, and the minimum ILIM current.
Keep in mind that the temperature coefficient of the MOSFET,
RDSON, is typically 0.4%/oC.
A
47
_
µ
×
=
MAX
DSON
LPK
ILIM
R
I
R
where:
ILPK is the peak inductor current.



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