STM32H757AI datasheet(20/251 Pages) STMICROELECTRONICS

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Functional overview

STM32H757xI

20/251

DS12931 Rev 1

Functional overview

3.1

Dual Arm® Cortex® cores

The dual-core MIPI-DSI STM32H757xI devices embed two Arm® cores, a Cortex®-M7 and

a Cortex®-M4. The Cortex®-M4 offers optimal performance for real-time applications while

the Cortex®-M7 core can execute high-performance tasks in parallel.

The two cores belong to separate power domains. This allows designing gradual high-

power efficiency solutions in combination with the low-power modes already available on all

STM32 microcontrollers.

3.1.1

Arm® Cortex®-M7 with FPU

The Arm® Cortex®-M7 with double-precision FPU processor is the latest generation of Arm

processors for embedded systems. It was developed to provide a low-cost platform that

meets the needs of MCU implementation, with a reduced pin count and optimized power

consumption, while delivering outstanding computational performance and low interrupt

latency.

The Cortex®-M7 processor is a highly efficient high-performance featuring:

•

Six-stage dual-issue pipeline

•

Dynamic branch prediction

•

Harvard architecture with L1 caches (16 Kbytes of I-cache and 16 Kbytes of D-cache)

•

64-bit AXI interface

•

64-bit ITCM interface

•

2x32-bit DTCM interfaces

The following memory interfaces are supported:

•

Separate Instruction and Data buses (Harvard Architecture) to optimize CPU latency

•

Tightly Coupled Memory (TCM) interface designed for fast and deterministic SRAM

accesses

•

AXI Bus interface to optimize Burst transfers

•

Dedicated low-latency AHB-Lite peripheral bus (AHBP) to connect to peripherals.

The processor supports a set of DSP instructions which allow efficient signal processing and

complex algorithm execution.

It also supports single and double precision FPU (floating point unit) speeds up software

development by using metalanguage development tools, while avoiding saturation.

Figure 1 shows the general block diagram of the STM32H757xI family.

Note:

Cortex®-M7 with FPU core is binary compatible with the Cortex®-M4 core.

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