STM32H757AI datasheet(43/251 Pages) STMICROELECTRONICS

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DS12931 Rev 1

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STM32H757xI

Functional overview

3.30.1

High-resolution timer (HRTIM1)

The high-resolution timer (HRTIM1) allows generating digital signals with high-accuracy

timings, such as PWM or phase-shifted pulses.

It consists of 6 timers, 1 master and 5 slaves, totaling 10 high-resolution outputs, which can

be coupled by pairs for deadtime insertion. It also features 5 fault inputs for protection

purposes and 10 inputs to handle external events such as current limitation, zero voltage or

zero current switching.

The HRTIM1 timer is made of a digital kernel clocked at 480 MHz The high-resolution is

available on the 10 outputs in all operating modes: variable duty cycle, variable frequency,

and constant ON time.

The slave timers can be combined to control multiswitch complex converters or operate

independently to manage multiple independent converters.

The waveforms are defined by a combination of user-defined timings and external events

such as analog or digital feedbacks signals.

HRTIM1 timer includes options for blanking and filtering out spurious events or faults. It also

offers specific modes and features to offload the CPU: DMA requests, Burst mode

controller, Push-pull and Resonant mode.

It supports many topologies including LLC, Full bridge phase shifted, buck or boost

converters, either in voltage or current mode, as well as lighting application (fluorescent or

LED). It can also be used as a general purpose timer, for instance to achieve high-resolution

PWM-emulated DAC.

Basic

TIM6,

TIM7

16-bit

Any

integer

between 1

and

65536

Yes

120

240

Low-

power

timer

LPTIM1,

LPTIM2,

LPTIM3,

LPTIM4,

LPTIM5

16-bit

1, 2, 4, 8,

16, 32, 64,

128

120

240

1. The maximum timer clock is up to 480 MHz depending on TIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in

RCC_D2CFGR register.

Table 5. Timer feature comparison (continued)

Timer

type

Timer

Counter

resolution

Counter

type

Prescaler

factor

DMA

request

generation

Capture/

compare

channels

Comple-

mentary

output

Max

interface

clock

(MHz)

Max

timer

clock

(MHz)

(1)

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