STM32H757AI datasheet(206/251 Pages) STMICROELECTRONICS

部件名	STM32H757AI

功能描述	Dual 32-bit Arm® Cortex®-M7 up to 480MHz and -M4 MCUs, 2MB Flash, 1MB RAM, 46 com. and analog interfaces, SMPS, DSI, crypto

PDF	251 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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206 / 251 page

Electrical characteristics

STM32H757xI

206/251

DS12931 Rev 1

Table 113. DFSDM measured timing 1.62-3.6 V

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

fDFSDMCLK

DFSDM

clock

1.62 < VDD < 3.6 V

133

fCKIN

(1/TCKIN)

Input clock

frequency

SPI mode (SITP[1:0]=0,1),

External clock mode

(SPICKSEL[1:0]=0),

1.62 < VDD < 3.6 V

SPI mode (SITP[1:0]=0,1),

External clock mode

(SPICKSEL[1:0]=0),

2.7 < VDD < 3.6 V

SPI mode (SITP[1:0]=0,1),

Internal clock mode

(SPICKSEL[1:0]¹0),

1.62 < VDD < 3.6 V

SPI mode (SITP[1:0]=0,1),

Internal clock mode

(SPICKSEL[1:0]¹0),

2.7 < VDD < 3.6 V

fCKOUT

Output clock

frequency

1.62 < VDD < 3.6 V

DuCyCKOU

Output clock

frequency

duty cycle

1.62 < VDD < 3.6 V

twh(CKIN)

twl(CKIN)

Input clock

high and low

time

SPI mode (SITP[1:0]=0,1),

External clock mode

(SPICKSEL[1:0]=0),

1.62 < VDD < 3.6 V

TCKIN/2-0.5

TCKIN/2

tsu

Data input

setup time

SPI mode (SITP[1:0]=0,1),

External clock mode

(SPICKSEL[1:0]=0),

1.62 < VDD < 3.6 V

1.5

Data input

hold time

SPI mode (SITP[1:0]=0,1),

External clock mode

(SPICKSEL[1:0]=0),

1.62 < VDD < 3.6 V

0.5

TManchester

Manchester

data period

(recovered

clock period)

Manchester mode (SITP[1:0]=2,3),

Internal clock mode

(SPICKSEL[1:0]¹0),

1.62 < VDD < 3.6 V

(CKOUTDIV+1)

* TDFSDMCLK

(2*CKOUTDIV)

* TDFSDMCLK

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