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TDA4VL...ALZQ1 数据表(PDF) 208 Page - Texas Instruments

部件名 TDA4VL...ALZQ1
功能描述  TDA4VE TDA4AL TDA4VL Jacinto™ Processors, Silicon Revision 1.0
PDF  251 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4VL...ALZQ1 数据表(HTML) 208 Page - Texas Instruments

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7.10.5.17.1.4 HS200 Mode
Table 7-65 and Figure 7-83 present switching characteristics for MMC0 – HS200 Mode.
Table 7-65. MMC0 Switching Characteristics – HS200 Mode
see Figure 7-83
NO.
PARAMETER
MIN
MAX
UNIT
fop(clk)
Operating frequency, MMC0_CLK
200
MHz
HS2005
tc(clk)
Cycle time, MMC0_CLK
5
ns
HS2006
tw(clkH)
Pulse duration, MMC0_CLK high
2.08
ns
HS2007
tw(clkL)
Pulse duration, MMC0_CLK low
2.08
ns
HS2008
td(clkL-cmdV)
Delay time, MMC0_CLK rising edge to MMC0_CMD transition
0.99
3.16
ns
HS2009
td(clkL-dV)
Delay time, MMC0_CLK rising edge to MMC0_DAT[7:0] transition
0.99
3.16
ns
Figure 7-83. MMC0 – HS200 Mode – Transmit Mode
7.10.5.17.1.5 HS400 Mode
Table 7-66 and Figure 7-84 present switching characteristics for MMC0 – HS400 Mode.
Table 7-66. MMC0 Switching Characteristics – HS400 Mode
see Figure 7-84
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
fop(clk)
Operating frequency, MMC0_CLK
200
MHz
HS4005
tc(clk)
Cycle time, MMC0_CLK
5
ns
HS4006
tw(clkH)
Pulse duration, MMC0_CLK high
2.08
ns
HS4007
tw(clkL)
Pulse duration, MMC0_CLK low
2.08
ns
HS4008
td(clkH-cmdV)
Delay time, MMC0_CLK rising clock edge to MMC0_CMD
transition
0.99
3.28
ns
HS4009
td(clkV-dV)
Delay time, MMC0_CLK transition to MMC0_DAT[7:0] transition
0.59
1.84
ns
MMC0_CLK
MMC
CMD
0_
MMC
DAT
0_
[7:0]
H 4005
S
H 4007
S
H 4006
S
H 400
S
8
H 4009
S
H 400
S
8
H 400
S
9
Figure 7-84. eMMC in – HS400 Mode – Transmitter Mode
TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1
SPRSP62 – DECEMBER 2022
www.ti.com
208
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1



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