STM32F103CBU6TR datasheet(110/116 Pages) STMICROELECTRONICS

110 / 116 page

Revision history

STM32F103x8, STM32F103xB

110/116

DS5319 Rev 18

22-Nov-2007

Document status promoted from preliminary data to datasheet.



The STM32F103xx is USB certified. Small text changes.



Power supply schemes on page 15 modified. Number of communication

peripherals corrected for STM32F103Tx and number of GPIOs corrected

for LQFP package in Table 2: STM32F103xx medium-density device

features and peripheral counts.



Main function and default alternate function modified for PC14 and PC15

in, Note 6 added and Remap column added in Table 5: Medium-density

STM32F103xx pin definitions.



VDD–VSS ratings and Note 1 modified in Table 6: Voltage characteristics,

Note 1 modified in Table 7: Current characteristics.



Note 1 and Note 2 added in Table 11: Embedded reset and power control

block characteristics.



IDD value at 72 MHz with peripherals enabled modified in Table 14:

Maximum current consumption in Run mode, code with data processing

running from RAM.



IDD value at 72 MHz with peripherals enabled modified in Table 15:

Maximum current consumption in Sleep mode, code running from Flash

or RAM on page 43.



IDD_VBAT typical value at 2.4 V modified and IDD_VBAT maximum values

added in Table 16: Typical and maximum current consumptions in Stop

and Standby modes. Note added in Table 17 on page 47 and Table 18 on

page 48. ADC1 and ADC2 consumption and notes modified in Table 19:

Peripheral current consumption.



tSU(HSE) and tSU(LSE) conditions modified in Table 22 and Table 23,

respectively.



Maximum values removed from Table 26: Low-power mode wakeup

timings. tRET conditions modified in Table : . Figure 14: Power supply

scheme corrected.



Figure 20: Typical current consumption in Stop mode, with regulator in

Low-power mode added.



Note removed below Figure 33: SPI timing diagram - slave mode and

CPHA = 0. Note added below Figure 34: SPI timing diagram - slave mode

and CPHA = 1(1).



Details on unused pins removed from General input/output

characteristics on page 61.



Table 42: SPI characteristics updated. Table 43: USB startup time added.

VAIN, tlat and tlatr modified, note added and Ilkg removed in Table 46: ADC

characteristics. Test conditions modified and note added in Table 49:

ADC accuracy. Note added below Table 47 and Table 50.



Inch values corrected in Table 55: LQPF100 mechanical data, Table 58:

LQFP64 mechanical data and Table 60: LQFP48, 7 x 7 mm, 48-pin low-

profile quad flat package mechanical data.



JAvalue for VFQFPN36 package added in Table 62: Package thermal

characteristics



Order codes replaced by Section 7: Ordering information scheme.



MCU ‘s operating conditions modified in Typical current consumption on

page 46. Avg_Slope and V25 modified in Table 50: TS characteristics. I2C

interface characteristics on page 68 modified.



Impedance specified in A.4: Voltage glitch on ADC input 0 on page 81.

Table 63. Document revision history (continued)

Date

Revision

Changes

STM32F103CBU6TR 数据表(PDF) 110 Page - STMicroelectronics

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