STM32F103CBU6TR datasheet(114/116 Pages) STMICROELECTRONICS

114 / 116 page

Revision history

STM32F103x8, STM32F103xB

114/116

DS5319 Rev 18

19-Apr-2011

Updated footnotes below Table 6: Voltage characteristics on page 37 and

Table 7: Current characteristics on page 37

Updated tw min in Table 20: High-speed external user clock

characteristics on page 50

Updated startup time in Table 23: LSE oscillator characteristics (fLSE =

32.768 kHz) on page 53

Added Section 5.3.12: I/O current injection characteristics

Updated Section 5.3.13: I/O port characteristics

07-Dec-2012

Added UFBGA100 7 x 7 mm.

Updated Figure 59: LQFP64, 10 x 10 mm, 64-pin low-profile quad flat

package outline to add pin 1 identification.

14-May-2013

Replaced VQFN48 package with UQFN48 in cover page packages,

Table 2: STM32F103xx medium-density device features and peripheral

counts, Figure 9: STM32F103xx performance line UFQFPN48 pinout,

Table 2: STM32F103xx medium-density device features and peripheral

counts, Table 56: UFBGA100 mechanical data, Table 63: Ordering

information scheme and updated Table 62: Package thermal

characteristics

Added footnote for TFBGA ADC channels in Table 2: STM32F103xx

medium-density device features and peripheral counts

Updated ‘All GPIOs are high current...’ in Section 2.3.21: GPIOs

(general-purpose inputs/outputs)

Updated Table 5: Medium-density STM32F103xx pin definitions

Corrected Sigma letter in Section 5.1.1: Minimum and maximum values

Removed the first sentence in Section 5.3.16: Communications

interfaces

Added ‘VIN’ in Table 9: General operating conditions

Updated first sentence in Output driving current

Added note 5. in Table 24: HSI oscillator characteristics

Updated ‘VIL’ and ‘VIH’ in Table 35: I/O static characteristics

Added notes to Figure 26: Standard I/O input characteristics - CMOS

port, Figure 27: Standard I/O input characteristics - TTL port, Figure 28:

5 V tolerant I/O input characteristics - CMOS port and Figure 29: 5 V

tolerant I/O input characteristics - TTL port

Updated Figure 32: I2C bus AC waveforms and measurement circuit

Updated note 2. and 3.,removed note “the device must internally...” in

Table 40: I2C characteristics

Updated title of Table 41: SCL frequency (fPCLK1 = 36 MHz, VDD_I2C = 3.3

Updated note 2. in Table 49: ADC accuracy

Updated Figure 53: UFBGA100 - 100-ball, 7 x 7 mm, 0.50 mm pitch, ultra

fine pitch ball grid array package outline and Table 56: UFBGA100

mechanical data

Updated Figure 47: LFBGA100 outline and Table 53: LFBGA100

mechanical data

Updated Figure 60: TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm

pitch, package outline and Table 59: TFBGA64 - 8 x 8 active ball array, 5

x 5 mm, 0.5 mm pitch, package mechanical data

Table 63. Document revision history (continued)

Date

Revision

Changes

STM32F103CBU6TR 数据表(PDF) 114 Page - STMicroelectronics

STM32F103CBU6TR 数据表(HTML) 114 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载