AM79C874VC datasheet(27/60 Pages) AMD

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Am79C874

P R E L I M INARY

Figure 6.

Advanced LED Configuration

Power Savings Mechanisms

The power consumption of the device is significantly re-

duced by its built-in power down features. Separate

power supply lines are also used to power the

10BASE-T circuitry and the 100BASE-TX circuitry.

Therefore, the two modes of operation can be turned-

on and turned-off independently. Whenever the Net-

PHY-1LP device is set to operate in a 100BASE-TX

mode, the 10BASE-T circuitry is powered down, and

when in 10BASE-T mode, the 100BASE-TX circuitry is

powered down.

The NetPHY-1LP device offers the following power

management: Selectable Transformer, Power Down,

Unplugged, and Idle.

Selectable Transformer

The TX outputs can drive either a 1:1 transformer or a

1.25:1 transformer. The latter can be used to reduce

transmit power further. The current at the TX

pins for

a 1:1 ratio transformer is 40 mA for MLT-3 and 100 mA

for 10BASE-T. Using the 1.25:1 ratio reduces the cur-

rent to 30 mA for MLT-3 and 67 mA for 10BASE-T.

The cost of using the 1.25:1 option is in impedance

coupling. The reflected capacitance is increased by the

square of the ratio (1.252 = 1.56). Thus, the reflected

capacitance on the media side is roughly one and a half

times the capacitance on the board. Extra care in the

layout to control capacitance on the board is required.

Power Down

Most of the NetPHY-1LP device can be disabled via the

Power Down bit in MII Register 0, bit 11. Setting this bit

will power down the entire device with the exception of

the MDIO/MDC management circuitry.

Unplugged

The TX output driver limits the drive capability if the re-

ceiver does not detect a link partner within 4 seconds.

This prevents “wasted” power. If the receiver detects

the absence of a link partner, the transmitter is limited

to transmitting normal link pulses. Any energy detected

by the receiver enables full transmit and receive capa-

bilities. The power savings is most notable when the

port is unconnected. Typical power drops to one third of

normal.

Idle Wire

This can be achieved by writing to MII Register 16, bit

0. During this mode, if there is no data other than idles

coming in, the receive clock (RX_CLK) will turn off to

save power for the attached controller. RX_CLK will re-

sume operation one clock period prior to the assertion

of RX_DV. The receive clock will again shut off 64 clock

cycles after RX_DV gets deasserted. Typical power

savings of 100 mW can be realized in some MACs.

LEDBTA

LEDBTB

10BASE-T LED Indicator

LEDTXA

LEDTXB

100BASE-TX LED Indicator

300

5 K

330

300

Dual-Color

LED

Dual-Color

LED

VCC

Receive

LEDRX

Collision

LEDCOL

Link (Note 1)

LEDLNK

Link (Note 2)

LEDLNK

VCC

LED

22235I-8

Notes:

1. Use for non 7-wire interface configurations.

2. Use for 7-wire interface configurations.

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