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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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AM79C874VC 数据表(PDF) 48 Page - Advanced Micro Devices |
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AM79C874VC 数据表(HTML) 48 Page - Advanced Micro Devices |
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48 / 60 page  48 Am79C874 P R E L I M INARY MII Signals 100 Mbps MII Transmit Timing Figure 18. 100 Mbps MII Transmit Start of Packet Timing Symbol Parameter Description Min. Max. Unit tMTS100 TX_ER,TX_EN, TXD[3:0] Setup Time to TX_CLK Rising Edge 12 - ns tMTH100 TX_ER, TX_EN, TXD[3:0] Hold time From TX_CLK Rising Edge 0 - ns tMTEJ100 Transmit Latency TX_EN Sampled by TX_CLK to First Bit of /J/ 60 140 ns tMTECRH100 CRS Assert From TX_EN Sampled HIGH - 40 ns tMTECOH100 COL Assert From TX_EN Sampled HIGH - 200 ns tMTDCRL100 CRS De-assert From TX_EN Sampled LOW - 160 ns tMTDCOL100 COL De-assert From TX_EN Sampled LOW 13 240 ns tMTIDLE100 Required De-assertion Time Between Packets 120 - ns tMTP100 TX_CLK Period 39.998 40.002 ns tMTWH100 TX_CLK HIGH 18 22 ns tMTWL100 TX_CLK LOW 18 22 ns TX_CLK TX_EN tMTS100 CRS COL TXD[3:0] TX_ER TX± tMTWH100 tMTWL100 tMTP100 tMTECRH100 tMTECOH100 tMTEJ100 tMTS100 tMTH100 /J/ 22235I-20 |
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