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ADE7169F16 数据表(PDF) 39 Page - Analog Devices |
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ADE7169F16 数据表(HTML) 39 Page - Analog Devices |
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39 / 140 page ![]() Preliminary Technical Data ADE7169F16 Rev. PrD | Page 39 of 140 Location Mnemonic Value 7 ICHANNEL 0 This bit indicate the current channel used to measure energy in anti- tampering mode. 0 – Channel A 1 – Channel B 6 FAULTSIGN 0 Configuration bit to select event that will trigger a Fault interrupt 0 – FAULT interrupt occurs when part enters Fault Mode 1 – FAULT interrupt occurs when part enters Normal Mode 5 VARSIGN 0 Configuration bit to select event that will trigger an reactive power sign interrupt 0 – VARSIGN interrupt occurs when reactive power changes from positive to negative 1 - VARSIGN interrupt occurs when reactive power changes from negative to positive 4 APSIGN 0 Configuration bit to select event that will trigger an active power sign interrupt 0 – APSIGN interrupt occurs when active power changes from positive to negative 1 - APSIGN interrupt occurs when active power changes from negative to positive 3 ABSVARM 0 Logic one enables absolute value accumulation of Reactive power in energy register and pulse output 2 SAVARM 0 Logic one enables reactive power accumulation depending on the sign of the active power: If Active Power is positive, VAR is accumulated as it is; If Active Power is negative, the sign of the VAR is reversed for the accumulation. This accumulation mode affects both the VAR registers and the VARCF output. 1 POAM 0 Logic one enables positive only accumulation of Active power in energy register and pulse output 0 ABSAM 0 Logic one enables absolute value accumulation of Active power in energy register and pulse output Table 33. GAIN register (0x1B) Bit Location Bit Mnemonic Default Value Description 7 - 5 PGA2[2:0] 0 These bits define the voltage channel input gain [2:0] 000 Gain = 1 001 Gain = 2 010 Gain = 4 011 Gain = 8 100 Gain = 16 4 - 3 Reserved 0 Reserved 2 - 0 PGA1[2:0] 0 These bits define the current channel input gain [2:0] 000 Gain = 1 001 Gain = 2 010 Gain = 4 011 Gain = 8 100 Gain = 16 Table 34. CALMODE register (0x3D) Bit Bit Default Description |
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