| 数据搜索系统,热门电子元器件搜索 |
|
ADE7169F16 数据表(PDF) 21 Page - Analog Devices |
|
|
|||||||||||||||||||||||||||||
ADE7169F16 数据表(HTML) 21 Page - Analog Devices |
|
21 / 140 page ![]() Preliminary Technical Data ADE7169F16 Rev. PrD | Page 21 of 140 Pin No. Mnemonic Description 51 EA This pin is used as an input for emulation. When held high, this input enables the device to fetch code from internal program memory locations.The ADE7169F16 does not support external code memory. This pin should not be left floating. 52, 53 IP, IN Analog Inputs for Current Channel. These inputs are fully differential voltage inputs with a maximum differential level of ±500mV for specified operation. This channel also has an internal PGA. 54 AGND This pin provides the ground reference for the analog circuitry 55 IPB Analog Inputs for second Current Channel. This input is fully differential with a maximum differential level of ±500mVrefered to IN for specified operation. This channel also has an internal PGA. 56 RESET Reset input, Active low 57 REFIN/OUT This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of 1.2 V ± 8% and a typical temperature coefficient of 50 ppm/°C maximum 58 VBAT 3.3V Power supply input from Battery. This pin is connected internally to VDD when the Battery is selected as the power supply for the ADE7169F16. 59 VINTA This pin provides access to the on-chip 2.5V analog LDO. No external active circuitry should be connected to this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100nF capacitor. 60 VDD 3.3V Power supply input from regulator. This pin is connected internally to VDD when the regulator is selected as the power supply for the ADE7169F16. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100nF capacitor. 61 VSWOUT 3.3V Power supply output from ADE7169F16. This pin provides the supply voltage for the LDOs and internal cicuitry of the ADE7169F16. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100nF capacitor. 62 VINTD This pin provides access to the on-chip 2.5V digital LDO. No external active circuitry should be connected to this pin. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100nF capacitor. 63 DGND This pin provides the ground reference for the digital circuitry 64 VDCIN Analog input for dc voltage monitoring. The maximum input voltage on this pin is xxxmV with respect to AGND. This pin is used to monitor the pre-regulated dc voltage. |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |