ADE7169F16 datasheet(102/140 Pages) AD

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ADE7169F16

Preliminary Technical Data

Rev. PrD | Page 102 of 140

command. For example to write the protection value in

EADRH the two following commands need to be executed:

Command ‘I ‘ with Data = Value of protection byte

0x3FFF

Command ‘F’ with Data = 0xC7

Following this protocol, the protection can be written to the

Flash using the same sequence as mentioned in the Enabling

Flash Protection by Code paragraph. When the part is reset the

protection will be effective.

Notes on Flash Protection

The flash protection scheme is disabled by default so that none

of the pages of the flash are protected from reading or

writing/erasing.

The last page must be read and write/erase protected for the

protection scheme to work.

To activate the protection settings, the ADE7169F16 must be

reset after configuring the protection.

After configuring protection on the last page and resetting the

part, protections that have been enabled can only be removed

by mass erasing the flash memory. The protection bits are read

and erase protected by enabling read and write/erase protection

the last page, but the protection bits are never truly write

protected. Protection bits can be programmed modified from a

1 to a 0, even after the last page has been protected. In this way,

more protection can be added but none can be removed.

If a page of code is write/erase protected, it cannot be written

over even if an erase all command is issued. The write/erase

protected page will not be updated if new code is downloaded.

If a page is read protected, this part of the code cannot be read

or emulated.

The protection scheme is intended to protect the end system.

Protection should be disabled while developing and emulating

code.

Flash memory timing

Typical program and erase times for the flash memory are as

follows:

Command

Bytes Affected

Flash Memory Timing

WRITE BYTE

1 byte

30us

ERASE PAGE

512 bytes

20ms

ERASEALL

16 kbytes

200ms

READ BYTE

1 bytes

100ns

ERASEPAGE and

WRITE BYTE

512 bytes

21ms

VERIFY BYTE

1 byte

100ns

Note that the core microcontroller operation is idled until the

requested flash memory operation is complete. In practice, this

means that even though the Flash operation is typically initiated

with a two-machine-cycle MOV instruction (to write to the

Flash Control SFR (ECON, 0xB9)), the next instruction is not

executed until the Flash/EE operation is complete. This means

that the core cannot respond to interrupt requests until the

Flash/EE operation is complete, although the core peripheral

functions such as counter/ timers continue to count as

configured throughout this period.

IN CIRCUIT PROGRAMMING

Serial Downloading

The ADE7169F16 facilitates code download via the standard

UART serial port. The parts enter serial download mode after a

reset or a power cycle if the SDEN pin is pulled low through an

external 1 kΩ resistor. Once in serial download mode, the

hidden embedded download kernel executes. This allows the

user to download code to the full 16 kbytes of Flash memory

while the device is in circuit in its target application hardware.

Protection configured in the last page of the ADE7169F16

affects whether flash memory can be accessed in serial

download mode. Read protected pages cannot be read.

Write/erase protected pages cannot be written or erased. The

configuration bits cannot be programmed in serial download

mode.

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