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TMS320C6421 数据表(PDF) 31 Page - Texas Instruments

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部件名 TMS320C6421
功能描述  Fixed-Point Digital Signal Processor
PDF  59 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TMS320C6421 数据表(HTML) 31 Page - Texas Instruments

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TMS320C6421
Fixed-Point Digital Signal Processor
SPRS346A – JANUARY 2007 – REVISED MARCH 2007
Table 2-15. EMAC (MII/RMII) and MDIO Terminal Functions
SIGNAL
TYPE(1)
OTHER(2)(3)
DESCRIPTION
ZWT
ZDU
NAME
NO.
NO.
EMAC (MII)
HCNTL1/MTXEN/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
D3
C4
I/O/Z
GP[75]
DVDD33
In Ethernet MAC (MII) mode, it is Transmit Enable output MTXEN.
HD15/MTXCLK/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
A4
A4
I/O/Z
GP[73]
DVDD33
In Ethernet MAC (MII) mode, it is Transmit Clock input MTXCLK.
HD9/MCOL/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
C6
C6
I/O/Z
GP[67]
DVDD33
In Ethernet MAC (MII) mode, it is Collision Detect input MCOL.
HD11/MTXD3/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
C5
A5
I/O/Z
GP[69]
DVDD33
In Ethernet MAC (MII) mode, it is Transmit Data 3 output MTXD3.
HD12/MTXD2/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
D5
C5
I/O/Z
GP[70]
DVDD33
In Ethernet MAC (MII) mode, it is Transmit Data 2 output MTXD2.
HD13/MTXD1/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
B4
B4
I/O/Z
GP[71]
DVDD33
In Ethernet MAC (MII) mode, it is Transmit Data 1 output MTXD1.
HD14/MTXD0/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
D4
B5
I/O/Z
GP[72]
DVDD33
In Ethernet MAC (MII) mode, it is Transmit Data 0 output MTXD0.
HR/W/MRXCLK/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
A3
A3
I/O/Z
GP[77]
DVDD33
In Ethernet MAC (MII) mode, it is Receive Clock input MRXCLK.
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
HHWIL/MRXDV/
IPD
C4
D3
I/O/Z
In Ethernet MAC (MII) mode, it is Receive Data Valid input
GP[74]
DVDD33
MRXDV.
HCNTL0/MRXER/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
B3
B2
I/O/Z
GP[76]
DVDD33
In Ethernet MAC (MII) mode, it is Receive Error input MRXER.
HD10/MCRS/
IPD
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
B5
B6
I/O/Z
GP[68]
DVDD33
In Ethernet MAC (MII) mode, it is Carrier Sense input MCRS.
HINT/MRXD3/
IPU
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
C2
D2
I/O/Z
GP[82]
DVDD33
In Ethernet MAC (MII) mode, it is Receive Data 3 input MRXD3.
HRDY/MRXD2/
IPU
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
D2
C3
I/O/Z
GP[80]
DVDD33
In Ethernet MAC (MII) mode, it is Receive Data 2 input MRXD2.
HDS1/MRXD1/
IPU
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
B2
B3
I/O/Z
GP[79]
DVDD33
In Ethernet MAC (MII) mode, it is Receive data 1 input MRXD1.
HDS2/MRXD0/
IPU
This pin is multiplexed between HPI, EMAC (MII), and GPIO.
C3
C2
I/O/Z
GP[78]
DVDD33
In Ethernet MAC (MII) mode, it is Receive Data 0 input MRXD0.
EMAC (RMII)
This pin is multiplexed between EMAC (RMII) and GPIO.
IPD
RMCRSDV/GP[30]
G19
K22
I/O/Z
In Ethernet MAC(RMII) mode, it is EMAC carrier sense/receive
DVDD33
data valid (RMCRSDV) [I].
This pin is multiplexed between EMAC (RMII) and GPIO.
IPD
RMRXER/GP[52]
A15
A19
I/O/Z
In Ethernet MAC(RMII) mode, it is EMAC receive error (RMRXER)
DVDD33
[I].
This pin is multiplexed between EMAC (RMII) and GPIO.
RMTXD1/GP[27]/
IPU
H17
L19
I/O/Z
In Ethernet MAC(RMII) mode, it is EMAC transmit data pin 1
(LENDIAN)
DVDD33
(RMTXD1) [O/Z].
This pin is multiplexed between EMAC (RMII) and GPIO.
IPD
RMTXD0/GP[28]
H16
J21
I/O/Z
In Ethernet MAC(RMII) mode, it is EMAC transmit data pin 0
DVDD33
(RMTXD0) [O/Z].
This pin is multiplexed between EMAC (RMII) and GPIO.
IPD
RMREFCLK/GP[31]
D19
G22
I/O/Z
In Ethernet MAC(RMII) mode, it is EMAC RMII reference clock
DVDD33
(RMREFCLK) [I].
This pin is multiplexed between EMAC (RMII) and GPIO.
IPD
RMTXEN/GP[29]
H15
K21
I/O/Z
In Ethernet MAC(RMII) mode, it is EMAC transmit enable
DVDD33
(RMTXEN) [O/Z].
(1)
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal
(2)
IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external
pullup/pulldown resistors are required, see Section 3.2.1, Pullup/Pulldown Resistors.
(3)
Specifies the operating I/O supply voltage for each signal
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