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5.2 Recommended Operating Conditions

(1)

TMS320C6421

Fixed-Point Digital Signal Processor

SPRS346A – JANUARY 2007 – REVISED MARCH 2007

MIN

NOM

MAX

UNIT

(-600, -500,

1.14

1.2

1.26

-400 devices)

CVDD

Supply voltage, Core (CVDD) (2)

(-400 devices)

1.0

1.05

1.1

Supply voltage, I/O, 3.3V (DVDD33)

3.14

3.3

3.46

DVDD

Supply voltage, I/O, 1.8V (DVDDR2, DDR_VDDDLL, PLLPWR18,

1.71

1.8

1.89

MXVDD(3))

VSS

Supply ground (VSS, DDR_VSSDLL, MXVSS(4))

DDR_VREF

DDR2 reference voltage(5)

0.49DVDDR2

0.5DVDDR2

0.51DVDDR2

DDR_ZP

DDR2 impedance control, connected via 200

Ω resistor to V

VSS

DDR_ZN

DDR2 impedance control, connected via 200

Ω resistor to DV

DDR2

DVDDR2

High-level input voltage, 3.3V (except I2C pins)

VIH

High-level input voltage, I2C

0.7DVDD33

Low-level input voltage, 3.3V (except I2C pins)

0.8

VIL

Low-level input voltage, I2C

0.3DVDD33

Commercial

°C

Operating Junction temperature(6)(7)

Extended

–40

125

°C

Commercial

°C

Operating Ambient Temperature(7)

Extended

-40

°C

(-600 devices)

600

MHz

FSYSCLK1

DSP Operating Frequency (SYSCLK1)

(-500 devices)

500

MHz

(-400 devices)

400

MHz

(1)

For -400 speed devices, either a 1.05-V or a 1.2-V core supply voltage can be used. The actual voltage must be determined at device

power-up, and not be changed dynamically during run-time.

(2)

Future variants of TI SOC devices may operate at voltages ranging from 0.9 V to 1.4 V to provide a range of system power/performance

options. TI highly recommends that users design-in a supply that can handle multiple voltages within this range (i.e., 1.0 V, 1.05 V,

1.1 V, 1.14 V, 1.2, 1.26 V with ± 3% tolerances) by implementing simple board changes such as reference resistor values or input pin

configuration modifications. Not incorporating a flexible supply may limit the system's ability to easily adapt to future versions of TI SOC

devices.

(3)

Oscillator 1.8 V power supply (MXVDD) can be connected to the same 1.8 V power supply as DVDDR2.

(4)

Oscillator ground (MXVSS) must be kept separate from other grounds and connected directly to the crystal load capacitor ground.

(5)

DDR_VREF is expected to equal 0.5DVDDR2 of the transmitting device and to track variations in the DVDDR2.

(6)

In the absence of a heat sink or direct thermal attachment on the top of the device, use the following formula to determine the device

junction temperature: TJ = TC + (Power x PsiJT). Power and TC can be measured by the user. Section 7.1, Thermal Data for ZWT and

Section 7.1.1, Thermal Data for ZDU provide the junction-to-package top (PSIJT) value based on airflow in the system. In the presence

of a heat sink or direct thermal attachment on the top of the device, additional calculations and considerations must be taken into

account. For more detailed information on thermal considerations, measurements, and calculations, see the TMS320C642x Thermal

Considerations Application Report (literuature number SPRAATBD).

(7)

Applications must meet both the Operating Junction Temperature and Operating Ambient Temperature requirements. For more detailed

information on thermal considerations, measurements, and calculations, see the TMS320C642x Thermal Considerations Application

Report (literature number SPRAATBD).

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