TMS320C6421 datasheet(34/59 Pages) TI

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TMS320C6421

Fixed-Point Digital Signal Processor

SPRS346A – JANUARY 2007 – REVISED MARCH 2007

Table 2-17. Host-Port Interface Terminal Functions

SIGNAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

ZWT

ZDU

NAME

NO.

Host-Port Interface (HPI)

HD0/VLYNQ_SCRUN/

IPU

GP[58]

DVDD33

HD1/VLYNQ_RXD0/

GP[59]

HD2/VLYNQ_RXD1/

GP[60]

HD3/VLYNQ_RXD2/

GP[61]

HD4/VLYNQ_RXD3/

GP[62]

HD5/VLYNQ_TXD0/

GP[63]

HD6/VLYNQ_TXD1/

GP[64]

This pin is multiplexed between HPI, VLYNQ or EMAC (MII),

HD7/VLYNQ_TXD2/

and GPIO.

GP[65]

I/O/Z

In HPI mode, these pins are host-port data pins HD[15:0]

HD8/VLYNQ_TXD3/

IPD

(I/O/Z) and are multiplexed internally with the HPI address

GP[66]

DVDD33

lines.

HD9/MCOL/

GP[67]

HD10/MCRS/

GP[68]

HD11/MTXD3/

GP[69]

HD12/MTXD2/

GP[70]

HD13/MTXD1/

GP[71]

HD14/MTXD0/

GP[72]

HD15/MTXCLK/

GP[73]

This pin is multiplexed between HPI, EMAC (MII), and GPIO.

HHWIL/MRXDV/

IPD

I/O/Z

In HPI mode, this pin is half-word identification input HHWIL

GP[74]

DVDD33

(I).

This pin is multiplexed between HPI, EMAC (MII), and GPIO.

In HPI mode, this pin is control input 1 HCNTL1 (I). The state

HCNTL1/MTXEN/

IPD

I/O/Z

of HCNTL1 and HCNTL0 determines if address, data, or

GP[75]

DVDD33

control information is being transmitted between an external

host and the C6421.

This pin is multiplexed between HPI, EMAC (MII), and GPIO.

In HPI mode, this pin is control input 0 HCNTL0 (I). The state

HCNTL0/MRXER/

IPD

I/O/Z

of HCNTL1 and HCNTL0 determines if address, data, or

GP[76]

DVDD33

control information is being transmitted between an external

host and the C6421.

This pin is multiplexed between HPI, EMAC (MII), and GPIO.

HR/W/MRXCLK/

IPD

I/O/Z

In HPI mode, this pin is host read or write select input

GP[77]

DVDD33

HR/W(I).

HDS2/MRXD0/

IPU

This pin is multiplexed between HPI, EMAC (MII), and GPIO.

I/O/Z

GP[78]

DVDD33

In HPI mode, this pin is host data strobe input 2 HDS2 (I).

(1)

I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal

(2)

IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup/pulldown resistors and situations where external

pullup/pulldown resistors are required, see Section 3.2.1, Pullup/Pulldown Resistors.

(3)

Specifies the operating I/O supply voltage for each signal

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