TMS320C6421 datasheet(6/59 Pages) TI

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Device Overview

2.1 Device Characteristics

TMS320C6421

Fixed-Point Digital Signal Processor

SPRS346A – JANUARY 2007 – REVISED MARCH 2007

Table 2-1, provides an overview of the TMS320C6421 DSP. The tables show significant features of the

C6421 device, including the capacity of on-chip RAM, the peripherals, the CPU frequency, and the

package type with pin count.

Table 2-1. Characteristics of the C6421 Processor

HARDWARE FEATURES

C6421

DDR2 Memory Controller

(16-bit bus width) [1.8 V I/O]

Asynchronous (8-bit bus width),

Asynchronous EMIF [EMIFA]

RAM, Flash, (8-bit NOR or 8-bit NAND)

EDMA3

1 (64 independent channels, 8 QDMA channels)

2 64-bit General Purpose

Timers

(configurable as 2 64-bit or 4 32-bit)

1 64-bit Watch Dog

Peripherals

UART

1 with RTS and CTS flow control

Not all peripherals pins

I2C

1 (Master/Slave)

are available at the same

time (For more detail, see

McBSP

the Device Configuration

McASP

1 (4 serailizers)

section).

10/100 Ethernet MAC (EMAC) with

Management Data Input/Output (MDIO)

VLYNQ

General-Purpose Input/Output Port (GPIO)

Up to 111 pins

PWM

3 outputs

HPI (16-bit)

Size (Bytes)

96KB RAM, 64KB ROM

16K-Byte (16KB) L1 Program (L1P) RAM/Cache

On-Chip Memory

16KB L1 Data (L1D) RAM/Cache

Organization

64KB Unified Mapped RAM/Cache (L2)

64KB Boot ROM

Revision ID Register (MM_REVID.[15:0])

See theTMS320C6424/21 Digital Signal Processor

Megamodule Rev ID

(address location: 0x0181 2000)

(DSP) [Silicon Revisions 1.1 and 1.0] Silicon Errata

(literature number SPRZ252).

CPU ID + CPU Rev ID

Control Status Register (CSR.[31:16])

JTAGID register

See Section 6.1.1, JTAG Peripheral Register

JTAG BSDL_ID

(address location: 0x01C4 0028)

Description(s) – JTAG ID Register

CPU Frequency

MHz

400, 500, 600

2.5 ns (-400)

Cycle Time

2 ns (-500)

1.67 ns (-600)

Core (V)

1.2 V (-600, -500, -400), 1.05 V (-400)

Voltage

I/O (V)

1.8 V, 3.3 V

MXI/CLKIN frequency multiplier

PLL Options

x1 (Bypass), x14 to x 32

(15–30 MHz reference)

16 x 16 mm, 0.8 mm pitch

361-Pin BGA (ZWT)

BGA Package(s)

23 x 23 mm, 1.0 mm pitch

376-Pin BGA (ZDU)

Process Technology

µm

0.09

µm

Product Preview (PP), Advance Information (AI),

Product Status(1)

or Production Data (PD)

(1)

PRODUCT PREVIEW information concerns experimental products (designated as TMX) that are in the formative or design phase of

development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or

discontinue these products without notice.

Device Overview

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