TMS320C6421 datasheet(32/59 Pages) TI

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TMS320C6421

Fixed-Point Digital Signal Processor

SPRS346A – JANUARY 2007 – REVISED MARCH 2007

Table 2-15. EMAC (MII/RMII) and MDIO Terminal Functions (continued)

SIGNAL

TYPE(1)

OTHER(2)(3)

DESCRIPTION

ZWT

ZDU

NAME

NO.

This pin is multiplexed between EMAC (RMII), EMIFA, and GPIO.

RMRXD1/EM_CS5/

IPD

F19

J22

I/O/Z

In Ethernet MAC(RMII) mode, it is EMAC receive data pin 1

GP[33]

DVDD33

(RMRXD1) [I].

This pin is multiplexed between EMAC (RMII), EMIFA, and GPIO.

RMRXD0/EM_CS4/

IPD

E19

H22

I/O/Z

In Ethernet MAC(RMII) mode, it is EMAC receive data pin 0

GP[32]

DVDD33

(RMRXD0) [I].

MDIO

This pin is multiplexed between HPI, MDIO, and GPIO.

HCS/MDCLK/

IPU

I/O/Z

In Ethernet MAC mode, it is Management Data Clock output

GP[81]

DVDD33

MDCLK.

HAS/MDIO/

IPU

This pin is multiplexed between HPI, MDIO, and GPIO.

I/O/Z

GP[83]

DVDD33

In Ethernet MAC mode, it is Management Data I/O MDIO (I/O/Z).

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