AT83C5136-RDTUL datasheet(133/171 Pages) ATMEL

133 / 171 page

133

AT83C5134/35/36

7683B–USB–03/07

Table 97. UFNUMH Register

UFNUMH (S:BBh, read-only)

USB Frame Number High Register

Reset Value = 00h

Table 98. UFNUML Register

UFNUML (S:BAh, read-only)

USB Frame Number Low Register

Reset Value = 00h

CRCOK

CRCERR

FNUM10

FNUM9

FNUM8

Bit

Number

Bit

Mnemonic

Description

CRCOK

Frame Number CRC OK

This bit is set by hardware when a new Frame Number in Start of Frame Packet

is received without CRC error.

This bit is updated after every Start of Frame packet receipt.

Important note: the Start of Frame interrupt is generated just after the PID receipt.

CRCERR

Frame Number CRC Error

This bit is set by hardware when a corrupted Frame Number in Start of Frame

packet is received.

This bit is updated after every Start of Frame packet receipt.

Important note: the Start of Frame interrupt is generated just after the PID receipt.

Reserved

The value read from this bit is always 0. Do not set this bit.

2-0

FNUM[10:8]

Frame Number

FNUM[10:8] are the upper 3 bits of the 11-bit Frame Number (see the “UFNUML

page 133). It is provided in the last received SOF packet (see SOFINT in the

“USBIEN Register USBIEN (S:BEh) USB Global Interrupt Enable Register” on

page 124). FNUM is updated if a corrupted SOF is received.

FNUM7

FNUM6

FNUM5

FNUM4

FNUM3

FNUM2

FNUM1

FNUM0

Bit Number

Bit

Mnemonic Description

7 - 0

FNUM[7:0]

Frame Number

FNUM[7:0] are the lower 8 bits of the 11-bit Frame Number (See “UFNUMH

page 133.).

AT83C5136-RDTUL 数据表(PDF) 133 Page - ATMEL Corporation

AT83C5136-RDTUL 数据表(HTML) 133 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载