SC28C94 datasheet(2/38 Pages) PHILIPS

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Philips Semiconductors

Product specification

SC28C94

Quad universal asynchronous receiver/transmitter (QUART)

1998 Aug 19

853–2111 19896

DESCRIPTION

The 28C94 quad universal asynchronous receiver/transmitter

(QUART) combines four enhanced Philips Semiconductors

industry-standard UARTs with an innovative interrupt scheme that

can vastly minimize host processor overhead. It is implemented

using Philips Semiconductors’ high-speed CMOS process that

combines small die size and cost with low power consumption.

The operating speed of each receiver and transmitter can be

selected independently at one of eighteen fixed baud rates, a 16X

clock derived from a programmable counter/timer, or an external 1X

or 16X clock. The baud rate generator and counter/timer can

operate directly from a crystal or from external clock inputs. The

ability to independently program the operating speed of the receiver

and transmitter make the QUART particularly attractive for

dual-speed channel applications such as clustered terminal

systems.

Each receiver is buffered with eight character FIFOs (first-in-first-out

memories) and one shift register to minimize the potential for

receiver overrun and to reduce interrupt overhead in interrupt driven

systems. In addition, a handshaking capability is provided to disable

a remote UART transmitter when the receiver buffer is full. (RTS

control)

The 28C94 provides a power-down mode in which the oscillator is

stopped and the register contents are stored. This results in reduced

power consumption on the order of several magnitudes. The

QUART is fully TTL compatible and operates from a single +5V

power supply.

FEATURES

• New low overhead interrupt control

• All commercial parts meet industrial timing and temperature

parameters

• Four Philips Semiconductors industry-standard UARTs

• Eight byte receive FIFO and eight byte transmit FIFO for each

UART

• Programmable data format:

– 5 to 8 data bits plus parity

– Odd, even, no parity or force parity

– 1, 1.5 or 2 stop bits programmable in 1/16-bit increments

• Baud rate for the receiver and transmitter selectable from:

– 23 fixed rates: 50 to 230.4K baud Non-standard rates to 1.0M

baud

– User-defined rates from the programmable counter/timer

associated with each of two blocks

– External 1x or 16x clock

• Parity, framing, and overrun error detection

• False start bit detection

• Line break detection and generation

PIN CONFIGURATIONS

VCC

A5:0

CEN

RDN

WRN

IACKN

RESET

X1/CLK

RDa-d

VSS

D7-0

DACKN

RQN

I/O0a–d

I/O1a–d

I/O2a–d

I/O3a–d

TDa-d

SD00158

Figure 1. Pin Configuration

• Programmable channel mode

– Normal (full-duplex), automatic echo, local loop back, remote

loopback

• Programmable interrupt priorities

• Identification of highest priority interrupt

• Global interrupt register set provides data from interrupting

channel

• Vectored interrupts with programmable vector format

• IACKN and programmable DTACKN signals

• Built-in baud rate generator with choice of 18 rates

• Four I/O pins per UART for modem controls, clocks, etc.

• Power down mode

• High-speed CMOS technology

• 52-pin PLCC and 48-pin DIP

• Commercial and industrial temperature ranges available

• On-chip crystal oscillator

• TTL compatible

• Single +5V power supply with low power mode

• Two multifunction programmable 16-bit counter/timers

• 1MHz 16x mode operation

• 10ns data bus release time

• “Watch Dog” timer for each receiver

ORDERING INFORMATION

CG S

INDUSTRIAL

PACKAGES

VCC = +5V +10%,

TA = –40oC to +85oC

DWG #

48-Pin Plastic Dual In-Line Package (DIP)

SC28C94A1N

SOT240-1

52-Pin Plastic Leaded Chip Carrier (PLCC) Package

SC28C94A1A

SOT238-3

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