ADBMS2950BCCSZ datasheet(82/97 Pages) AD

82 / 97 page

ADBMS2950B

Data Sheet

Rev. 0 | Page 82 of 97

takes to perform open-wire diagnostics, which is normally not

required.

In typical applications with source impedances in the range of

5 kΩ to 10 kΩ, a filter capacitor of 100 nF is a good compromise

and provides (together with the external resistor) adequate ESD

protection in addition to the IC internal protection diodes. A

series resistor can be placed between the source and the IC pin

with the filter capacitor to improve the filtering and protection

further. For NTC temperature sensors, this also reduces the

dependency of the filter performance on the NTC temperature.

The chapter Digital Filtering gives additional details on the

transfer functions of the digital filters and the impact of the

external analog RC filters.

HIGH-VOLTAGE RESISTIVE DIVIDERS

Any high voltage to be measured by the ADBMS2950B must be

divided down and optionally biased through VREF1P25 to

move it into the IC’s input-pin voltage range (see Table 3 and

Table 5). Typically, the upper resistor consists of several resistors

connected in series to minimize the voltage drop and power

dissipation of individual resistors and to meet creepage and

clearance requirements and to prevent further damage to the

BMS if the resistors fail in short-circuit.

Figure 65 and Figure 66 show the examples of the

measurement by the VxADC or the VBxADC through Vx or

the VBATx inputs. In these figures, PTOT represents the total

power that is dissipated in the resistors while I represents the

current flowing through these resistors.

Even though the battery voltage measurements are typically

positive, it is also possible to bias the resistive divider connected

to VBATx to the VREF1P25 pin, which allows the

measurements below GND through the VBxADC inputs as

shown in Figure 69.

Figure 65. High-Ohmic Resistive Divider for Measuring 1000V Battery

through V1. Can be Applied to Any Vx, VBATx Input

Figure 66. High-Ohmic Resistive Divider for Measuring ±1000V through V1

Using VREF1P25. Can be Applied to Any Vx, VBATx Input

The resistive divider imposes a gain factor on the measured

signal:

g = Rlow ÷ (Rlow + Rhigh)

In case the divider is connected to GND, the high voltage is

calculated from the single-ended ADC measurements VADC,SGND

of the voltage at the low-side resistor Rlow vs. SGND in the

following way:

VHVa = VADC,SGND ÷ g

In case the divider is connected to VREF1P25, the high voltage

is calculated from the differential ADC measurements

VADC,VREF1P25 of the voltage at the low-side resistor Rlow vs.

VREF1P25 in the following way:

VHVb = VADC,VREF1P25 ÷ g + VREF1P25

The VREF1P25 pin voltage can vary slightly, and must therefore

be measured periodically by the AUX ADC, and close in time to

the Vx measurements. If not all Vx pins are used, it is

recommended to connect the VREF1P25 pin externally to one

of the unused Vx pins, considering the order of the VxADC

multichannel measurements. This allows measurement of the

VREF1P25 voltage close in time to the differential Vx

measurements vs. VREF1P25. In addition, it allows the

diagnosis of faults on the VREF1P25 pin.

As any resistive divider is affected by static tolerances, it can be

calibrated by applying a known input signal and calculating the

resistive divider factor g from the ADC measurement. An

optional external EEPROM can be used as a non-volatile

storage for those calibration factors.

The typical application Figure 46 shows the LINK voltage

(LINK+, LINK−) measured through two resistive dividers

biased to VREF1P25. For most applications, only LINK− can be

below BAT− when both contactors open, and the LINK side Cx

capacitor remains charged for a while. The Cx capacitor is

biased through the two dividers towards VREF1P25, initially

yielding LINK− to ~−0.5 × VBAT and LINK+ to ~+0.5 × VBAT,

while it is discharged through the resistive dividers. LINK+

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