PIC18F258-ESLASHSOSQTP datasheet(102/402 Pages) MICROCHIP

102 / 402 page

PIC18FXX8

DS41159E-page 100

9.3

PORTC, TRISC and LATC

Registers

PORTC is an 8-bit wide, bidirectional port. The corre-

sponding Data Direction register is TRISC. Setting a

TRISC bit (= 1) will make the corresponding PORTC

pin an input (i.e., put the corresponding output driver in

a high-impedance mode). Clearing a TRISC bit (= 0)

will make the corresponding PORTC pin an output (i.e.,

put the contents of the output latch on the selected pin).

Read-modify-write operations on the LATC register,

read and write the latched output value for PORTC.

PORTC is multiplexed with several peripheral functions

(Table 9-5). PORTC pins have Schmitt Trigger input

buffers.

When enabling peripheral functions, care should be

taken in defining TRIS bits for each PORTC pin. Some

peripherals override the TRIS bit to make a pin an output,

while other peripherals override the TRIS bit to make a

pin an input. The user should refer to the corresponding

peripheral section for the correct TRIS bit settings.

The pin override value is not loaded into the TRIS

EXAMPLE 9-3:

INITIALIZING PORTC

FIGURE 9-8:

PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE)

CLRF

PORTC

; Initialize PORTC by

; clearing output

; data latches

CLRF

LATC

; Alternate method

; to clear output

; data latches

MOVLW

0CFh

; Value used to

; initialize data

; direction

MOVWF

TRISC

; Set RC3:RC0 as inputs

; RC5:RC4 as outputs

; RC7:RC6 as inputs

Peripheral Out Select

Data Bus

WR LATC

WR TRISC

Data Latch

TRIS Latch

RD TRISC

Peripheral Data Out

VDD

VSS

RD PORTC

Peripheral Data In

I/O pin(1)

WR PORTC

RD LATC

Schmitt

Trigger

Note

1: I/O pins have diode protection to VDD and VSS.

TRIS

Override

Peripheral Enable

TRIS OVERRIDE

Override

Peripheral

RC0

Yes

Timer1 Oscillator

for Timer1/Timer3

RC1

Yes

Timer1 Oscillator

for Timer1/Timer3

RC2

—

RC3

Yes

SPI™/I2C™

Master Clock

RC4

Yes

I2C Data Out

RC5

Yes

SPI Data Out

RC6

Yes

USART Async

Xmit, Sync Clock

RC7

Yes

USART Sync Data

Out

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