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PIC18F258-E/SOSQTP 数据表(PDF) 120 Page - Microchip Technology |
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PIC18F258-E/SOSQTP 数据表(HTML) 120 Page - Microchip Technology |
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120 / 402 page  PIC18FXX8 DS41159E-page 118 © 2006 Microchip Technology Inc. 13.2 Timer2 Interrupt The Timer2 module has an 8-bit period register, PR2. Timer2 increments from 00h until it matches PR2 and then resets to 00h on the next increment cycle. PR2 is a readable and writable register. The PR2 register is initialized to FFh upon Reset. 13.3 Output of TMR2 The output of TMR2 (before the postscaler) is a clock input to the Synchronous Serial Port module which optionally uses it to generate the shift clock. FIGURE 13-1: TIMER2 BLOCK DIAGRAM TABLE 13-1: REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER Comparator TMR2 Sets Flag TMR2 Output(1) Reset Postscaler Prescaler PR2 2 FOSC/4 1:1 to 1:16 1:1, 1:4, 1:16 EQ 4 bit TMR2IF Note 1: TMR2 register output can be software selected by the SSP module as a baud clock. TOUTPS3:TOUTPS0 T2CKPS1:T2CKPS0 Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets INTCON GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF 0000 000x 0000 000u PIR1 PSPIF(1) ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 PIE1 PSPIE(1) ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 IPR1 PSPIP(1) ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP 1111 1111 1111 1111 TMR2 Timer2 Module Register 0000 0000 0000 0000 T2CON — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 PR2 Timer2 Period Register 1111 1111 1111 1111 Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used by the Timer2 module. Note 1: These registers or register bits are not implemented on the PIC18F248 and PIC18F258 and read as ‘0’s. |
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