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PIC18F258-E/SOSQTP 数据表(PDF) 125 Page - Microchip Technology |
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PIC18F258-E/SOSQTP 数据表(HTML) 125 Page - Microchip Technology |
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125 / 402 page  © 2006 Microchip Technology Inc. DS41159E-page 123 PIC18FXX8 15.0 CAPTURE/COMPARE/PWM (CCP) MODULES The CCP (Capture/Compare/PWM) module contains a 16-bit register that can operate as a 16-bit Capture register, as a 16-bit Compare register or as a PWM Duty Cycle register. The operation of the CCP module is identical to that of the ECCP module (discussed in detail in Section 16.0 “Enhanced Capture/Compare/PWM (ECCP) Module”) with two exceptions. The CCP module has a Capture special event trigger that can be used as a message received time-stamp for the CAN module (refer to Section 19.0 “CAN Module” for CAN operation) which the ECCP module does not. The ECCP module, on the other hand, has Enhanced PWM functionality and auto-shutdown capability. Aside from these, the operation of the module described in this section is the same as the ECCP. The control register for the CCP module is shown in Register 15-1. Table 15-2 (following page) details the interactions of the CCP and ECCP modules. REGISTER 15-1: CCP1CON: CCP1 CONTROL REGISTER U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — — DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 bit 7 bit 0 bit 7-6 Unimplemented: Read as ‘0’ bit 5-4 DCxB1:DCxB0: PWM Duty Cycle bit 1 and bit 0 Capture mode: Unused. Compare mode: Unused. PWM mode: These bits are the two LSbs (bit 1 and bit 0) of the 10-bit PWM duty cycle. The upper eight bits (DCx9:DCx2) of the duty cycle are found in CCPRxL. bit 3-0 CCPxM3:CCPxM0: CCPx Mode Select bits 0000 = Capture/Compare/PWM off (resets CCPx module) 0001 = Reserved 0010 = Compare mode, toggle output on match (CCPxIF bit is set) 0011 = Capture mode, CAN message received (CCP1 only) 0100 = Capture mode, every falling edge 0101 = Capture mode, every rising edge 0110 = Capture mode, every 4th rising edge 0111 = Capture mode, every 16th rising edge 1000 = Compare mode, initialize CCP pin low, on compare match force CCP pin high (CCPIF bit is set) 1001 = Compare mode, initialize CCP pin high, on compare match force CCP pin low (CCPIF bit is set) 1010 = Compare mode, CCP pin is unaffected (CCPIF bit is set) 1011 = Compare mode, trigger special event (CCP1IF bit is set; CCP resets TMR1 or TMR3 and starts an A/D conversion if the A/D module is enabled) 11xx =PWM mode Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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