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SC16C852LIB 数据表(PDF) 3 Page - NXP Semiconductors |
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SC16C852LIB 数据表(HTML) 3 Page - NXP Semiconductors |
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3 / 60 page  SC16C852L_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 25 January 2007 3 of 60 NXP Semiconductors SC16C852L 1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder 4. Block diagram Fig 1. Block diagram of SC16C852L (16 mode) TXA, TXB RXA, RXB SC16C852L XTAL2 XTAL1 D0 to D7 IOR IOW RESET 002aac403 DATA BUS AND CONTROL LOGIC REGISTER SELECT LOGIC A0 to A2 CSA CSB INTERRUPT CONTROL LOGIC INTA, INTB TXRDYA, TXRDYB RXRDYA, RXRDYB CLOCK AND BAUD RATE GENERATOR MODEM CONTROL LOGIC DTRA, DTRB RTSA, RTSB OP2A, OP2B CTSA, CTSB RIA, RIB CDA, CDB DSRA, DSRB RECEIVE SHIFT REGISTER RECEIVE FIFO REGISTER FLOW CONTROL LOGIC FLOW CONTROL LOGIC TRANSMIT SHIFT REGISTER TRANSMIT FIFO REGISTER IR DECODER IR ENCODER POWER- DOWN CONTROL LOWPWR |
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