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PPC440SPE 数据表(PDF) 65 Page - Applied Micro Circuits Corporation

部件名 PPC440SPE
功能描述  PowerPC 440SPe Embedded Processor
PDF  80 Pages
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制造商  AMCC [Applied Micro Circuits Corporation]
网页  http://www.amcc.com
标志 AMCC - Applied Micro Circuits Corporation

PPC440SPE 数据表(HTML) 65 Page - Applied Micro Circuits Corporation

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PowerPC 440SPe Embedded Processor
Revision 1.23 - Sept 21, 2006
AMCC Proprietary
65
Preliminary Data Sheet
I/O Specifications
Table 13. Peripheral Interface Clock Timings
Parameter
Min
Max
Units
Notes
PCIX0Clk input frequency (asynchronous mode)
–
133.33
MHz
2
PCIX0Clk period (asynchronous mode)
7.5
–
ns
PCIX0Clk input high time
40% of nominal period
60% of nominal period
ns
PCIX0Clk input low time
40% of nominal period
60% of nominal period
ns
EMCMDClk output frequency
–
2.5
MHz
EMCMDClk period
400
–
ns
EMCMDClk output high time
160
–
ns
EMCMDClk output low time
160
–
ns
EMCTxClk input frequency
2.5
25
MHz
EMCTxClk period
40
400
ns
EMCTxClk input high time
35% of nominal period
–
ns
EMCTxClk input low time
35% of nominal period
–
ns
EMCRxClk input frequency
2.5
25
MHz
EMCRxClk period
40
400
ns
EMCRxClk input high time
35% of nominal period
–
ns
EMCRxClk input low time
35% of nominal period
–
ns
PerClk output frequency (for sync. slaves)
–
83.33
MHz
PerClk period
12
–
ns
PerClk output high time
50% of nominal period
66% of nominal period
ns
PerClk output low time
33% of nominal period
50% of nominal period
ns
UARTSerClk input frequency
–
1000/(2TOPB
1+2ns)
MHz
1
UARTSerClk period
2TOPB+2
–ns
1
UARTSerClk input high time
TOPB+1
–ns
1
UARTSerClk input low time
TOPB+1
–ns
1
TmrClk input frequency
–
100
MHz
TmrClk period
10
–
ns
TmrClk input high time
40% of nominal period
60% of nominal period
ns
TmrClk input low time
40% of nominal period
60% of nominal period
ns
Notes:
1. TOPB is the period in ns of the OPB clock. The internal OPB clock runs at an integral divisor ratio of the frequency of
the PLB clock. The maximum OPB clock frequency is 83.33 MHz. Refer to the Clocking chapter of the PPC440SPe
Embedded Processor User’s Manual for details.
2. When the PCI-X interface is used to support a legacy PCI interface, the maximum PCIXClk frequency is 66.66MHz.



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