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PPC440SPE 数据表(PDF) 8 Page - Applied Micro Circuits Corporation |
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PPC440SPE 数据表(HTML) 8 Page - Applied Micro Circuits Corporation |
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8 / 80 page ![]() PowerPC 440SPe Embedded Processor 8 AMCC Proprietary Revision 1.23 - Sept 21, 2006 Preliminary Data Sheet Table 2. DCR Address Map (4KB of Device Configuration Registers) Function Start Address End Address Size Total DCR Address Space1 000 3FF 1KW (4KB)1 By function: Reserved 000 00B 12W Clocking Power On Reset 00C 00D 2W System DCRs 00E 00F 2W Memory Controller 010 011 2W External Bus Controller 012 013 2W Reserved 014 01F 12W SRAM 020 02F 16W L2 Controller 030 03F 16W Memory Queue 040 05F 32W I2O, DMA0 & DMA1 060 07F 32W PLB 080 08F 16W PLB to OPB Bridge Out 090 09F 16W Reserved 0A0 0AF 16W Reserved 0B2 0BF 14W Interrupt Controller 0 0C0 0CF 16W Interrupt Controller 1 0D0 0DF 16W Interrupt Controller 2 0E0 0EF 16W Interrupt Controller 3 0F0 0FF 16W PCI-Express 0 100 11F 32W PCI-Express 1 120 13F 32W PCI-Express 2 140 15F 32W Power Management 160 167 8W Reserved 168 17F 24W Ethernet MAL 180 1FF 128W Reserved 200 3FF 512W Notes: 1. DCR address space is addressable with up to 10 bits (1024 or 1K unique addresses). Each unique address represents a sin- gle 32-bit (word) register. One KW (1024W) equals 4KB (4096 bytes). |
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