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PPC440SPE 数据表(PDF) 67 Page - Applied Micro Circuits Corporation

部件名 PPC440SPE
功能描述  PowerPC 440SPe Embedded Processor
PDF  80 Pages
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制造商  AMCC [Applied Micro Circuits Corporation]
网页  http://www.amcc.com
标志 AMCC - Applied Micro Circuits Corporation

PPC440SPE 数据表(HTML) 67 Page - Applied Micro Circuits Corporation

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PowerPC 440SPe Embedded Processor
Revision 1.23 - Sept 21, 2006
AMCC Proprietary
67
Preliminary Data Sheet
Table 14. I/O Specifications—All Speeds (Sheet 1 of 2)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. PCI-X timings are for asynchronous operation up to 133.33MHz. PCI-X input setup time requirement is 1.2ns for 133.33MHz
and 1.7ns for 66.66MHz. PCI timings (in parentheses) are for asynchronous operation up to 66.66MHz. PCI output hold time
requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
3. These are DDR signals that can change on both the positive and negative clock transitions.
Signal
Input (ns)
Output (ns)
Output Current (mA)
Clock
Notes
Setup Time
(TIS min)
Hold Time
(TIH min)
Valid Delay
(TOV max)
Hold Time
(TOH min)
I/O H
(minimum)
I/O L
(minimum)
PCI-X Interface
PCIX0Ack64
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0AD63:00
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0BE7:0
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0CalG0:1
Note 2 (2)
0.5(0)
n/a
n/a
n/a
n/a
PCIX0Clk
2
PCIX0CalR0:1
dc
dc
n/a
n/a
n/a
n/a
async
PCIX0Cap
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Clk
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0DevSel
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0ECC5:2
n/a
n/a
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Frame
n/a
n/a
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Gnt0
n/a
n/a
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Gnt1
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Gnt2:3
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0IDSel
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0INTA
Note 2 (2)
0.5(0)
n/a
n/a
n/a
n/a
PCIX0Clk
2
PCIX0IRDY
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0M66En
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIXPar
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIXPar64
Note 2 (2)
0.5(0)
n/a
n/a
n/a
n/a
PCIX0Clk
2
PCIX0PErr
Note 2 (2)
0.5(0)
n/a
n/a
n/a
n/a
PCIX0Clk
2
PCIX0Req0
Note 2 (2)
0.5(0)
n/a
n/a
n/a
n/a
PCIX0Clk
2
PCIX0Req1:3
n/a
n/a
n/a
n/a
n/a
n/a
PCIX0Clk
2
PCIX0Req64
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Reset
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0SErr
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0Stop
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0TRDY
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
PCIX0VC
Note 2 (2)
0.5(0)
3.5(6)
0.7 (Note 2)
0.5
1.5
PCIX0Clk
2
Ethernet Interface
EMCCD
-
-
na
na
19.1
8.7
1, async
EMCCrS
-
-
na
na
19.1
8.7
1, async
EMCMDClk
na
na
na
na
19.1
8.7
1, async
EMCMDIO
-
-
-
-
19.1
8.7
EMCMDClk
EMCRxD0:7
4
1
na
na
19.1
8.7
EMCRxClk
EMCRxDV
4
1
na
na
19.1
8.7
EMCRxClk
EMCRxErr
-
-
na
na
19.1
8.7
EMCRxClk
EMCRxClk
-
-
na
na
19.1
8.7
1, async
EMCRefClk
-
-
na
na
19.1
8.7
EMCTxClk
na
na
na
na
19.1
8.7
1, async
EMCGTxClk
na
na
na
na
19.1
8.7
1, async
EMCTxD0:7
na
na
15
2
19.1
8.7
EMCTxClk



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