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M58PR512LE 数据表(PDF) 25 Page - STMicroelectronics |
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M58PR512LE 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 119 page ![]() M58PR256LE, M58PR512LE, M58PR001LE Command interface 25/119 4.7 Program command The Program command programs a single word to the memory array. It is supported only by program regions configured in control program mode. If a Program command is issued to a program region configured in object program mode, the program operation is aborted and the SR4 and SR8 Status Register bits are set (see Section 5: Program operations). Two bus write cycles are required to issue the Program command. ● The first bus cycle sets up the Program command. ● The second latches the address and data to be programmed and starts the P/EC (Program/Erase Controller). The Program command has to be written to the ’A’ segment halves (address bit A3 = 0) in the 1 Kbyte program region, whereas the data to be programmed is written to the specific address of the bank to be programmed. Once the programming has started, read operations in the bank being programmed output the Status Register contents. Programming can be performed in one bank at a time, meanwhile the other banks must be in Read or Erase Suspend mode. The Status Register P/EC bit, SR7, indicates the progress of the program operation. It should be read to check whether the operation has completed or not. After completion of the program operation (SR7 = 1), one of the error bits (SR4, SR3 and SR1) going High means that an error was detecte. Either a failure occurred during programming, VPP is outside the allowed voltage range, or an attempt to program a locked block was made. See Section 6: Status Register for detailed information. During a program operation, the bank containing the word being programmed only accepts the Read Array, Read Status Register, Read Electronic Signature, Read CFI Query and the Program/Erase Suspend command; all other commands are ignored. A Read Array command is required to return the bank to read array mode. Refer to Chapter 11 for detailed information about simultaneous operations allowed in banks not being programmed. Typical program times are given in Table 23: Program/erase times and endurance cycles. The program operation aborts if Reset, RP, goes to VIL. As data integrity cannot be guaranteed when the program operation is aborted, the word must be reprogrammed. See Appendix C, Figure 20: Program and EFA block program flowchart and pseudocode for the flowchart for using the Program command. |
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