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M58PR512LE 数据表(PDF) 31 Page - STMicroelectronics |
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M58PR512LE 数据表(HTML) 31 Page - STMicroelectronics |
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31 / 119 page ![]() M58PR256LE, M58PR512LE, M58PR001LE Command interface 31/119 4.13 Set Configuration Register command The Set Configuration Register command writes a new value to the Configuration Register. Two bus write cycles are required to issue the Set Configuration Register command. ● The first cycle sets up the Set Configuration Register command and the address corresponding to the Configuration Register content. ● The second cycle writes the Configuration Register data and the confirm command. The Configuration Register data must be written as an address during the bus write cycles, such as A0 = CR0, A1 = CR1, …, A15 = CR15. Addresses A16-Amax are ignored. Read operations output the array content after the Set Configuration Register command is issued. The Read Electronic Signature command is required to read the updated contents of the Configuration Register. 4.14 Block Lock command The Block Lock command is used to lock a block and prevent program or erase operations from changing the data in it. All blocks are locked after power-up or reset. Two bus write cycles are required to issue the Block Lock command. ● The first bus cycle sets up the Block Lock command. ● The second bus write cycle latches the block address and locks the block. The lock status can be monitored for each block using the Read Electronic Signature command. Table 22 shows the lock status after issuing a Block Lock command. Once set, the block lock bits remain set even after a hardware reset or power-down/power- up. They are cleared by a Block Unlock command. Refer to Section 12: Block locking for a detailed explanation. See Appendix C, Figure 25: Main array and EFA locking operations flowchart and pseudocode for a flowchart for using the Lock command. 4.15 Block Unlock command The Block Unlock command unlocks a block, allowing the block to be programmed or erased. Two bus write cycles are required to issue the Block Unlock command. ● The first bus cycle sets up the Block Unlock command. ● The second bus write cycle latches the block address and unlocks the block. The lock status can be monitored for each block using the Read Electronic Signature command. Table 22 shows the protection status after issuing a Block Unlock command. Refer to Section 12: Block locking for a detailed explanation and Appendix C, Figure 25: Main array and EFA locking operations flowchart and pseudocode for a flowchart for using the Block Unlock command. |
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