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AD4050BCPZ-R2 数据表(PDF) 53 Page - Analog Devices |
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AD4050BCPZ-R2 数据表(HTML) 53 Page - Analog Devices |
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53 / 67 page  Data Sheet AD4050/AD4056 REGISTER SUMMARY analog.com Rev. A | 53 of 67 The AD4050/AD4056 has programmable user registers for configuring the device. These registers are accessible while the AD4050/AD4056 is in configuration mode. Table 22 shows an overview of the AD4050/AD4056 user register map, and the Register Details section details the location and functions of the bit fields in each register. The access column in the various register details tables specifies whether the bit fields are read-only (R), read/write (R/W), or write-1-to-clear (R/W1C) bits. Table 22. AD4050/AD4056 Register Summary Address Name Description Reset Access 0x00 INTERFACE_CONFIG_A Interface Configuration A. 0x10 R/W 0x01 INTERFACE_CONFIG_B Interface Configuration B. 0x08 R/W 0x02 DEVICE_CONFIG Device Configuration. 0xF0 R/W 0x03 DEVICE_TYPE Device Type. 0x07 R 0x04 PRODUCT_ID_L (AD4050) Product Identification (LSByte). 0x70 R 0x04 PRODUCT_ID_L (AD4056) Product Identification (LSByte). 0x76 R 0x05 PRODUCT_ID_H Product Identification (MSByte). 0x00 R 0x06 DEVICE_GRADE Device Grade. 0x00 R 0x0A SCRATCH_PAD Scratch Pad. 0x00 R/W 0x0B SPI_REVISION SPI Revision. 0x84 R 0x0C VENDOR_L Vendor Identification (LSByte). 0x56 R 0x0D VENDOR_H Vendor Identification (MSByte). 0x04 R 0x0E STREAM_MODE Reserved. 0x00 R/W 0x0F TRANSFER_CONFIG Reserved. 0x00 R/W 0x10 INTERFACE_CONFIG_C Interface Configuration C. 0x13 R/W 0x11 INTERFACE_STATUS Interface Status. 0x00 R/W 0x12 to 0x1F RESERVED Reserved. 0x00 R 0x20 MODE_SET Device Mode Select. 0x00 R/W 0x21 ADC_MODES ADC Operating Mode Configuration. 0x80 R/W 0x22 ADC_CONFIG ADC Setup Configuration. 0x00 R/W 0x23 AVG_CONFIG Averaging Filter Configuration. 0x00 R/W 0x24 GP_CONFIG General Purpose Pin Configuration. 0xF0 R/W 0x25 INTR_CONFIG Interrupt Configuration. 0x21 R/W 0x26 CHOP_CONFIG Chop Signal Configuration. 0x00 R/W 0x27 TIMER_CONFIG Timer Configuration. 0x00 R/W 0x28 MAX_LIMIT_REG[7:0] Maximum Threshold Configuration. 0x0000 R/W 0x29 MAX_LIMIT_REG[15:8] 0x2A MIN_LIMIT_REG[7:0] Minimum Threshold Configuration. 0x0000 R/W 0x2B MIN_LIMIT_REG[15:8] 0x2C MAX_HYST_REG Maximum Threshold Hysteresis. 0x00 R/W 0x2D MIN_HYST_REG Minimum Threshold Hysteresis. 0x00 R/W 0x2E MON_VAL_REG[7:0] MON_VAL Scaling. 0x0000 R/W 0x2F MON_VAL_REG[15:8] 0x30 to 0x3F RESERVED Reserved. 0x00 R 0x40 FUSE_CRC Fuse CRC. 0x00 R/W 0x41 DEVICE_STATUS Device Status. 0x40 R/W 0x42 MAX_SAMPLE_REG[7:0] Maximum Interrupt Sample. 0x0000 R 0x43 MAX_SAMPLE_REG[15:8] 0x44 MIN_SAMPLE_REG[7:0] Minimum Interrupt Sample. 0x0000 R 0x45 MIN_SAMPLE_REG[15:8] |
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