L5965 datasheet(72/73 Pages) STMICROELECTRONICS

72 / 73 page

List of figures

Figure 1.

Simplified block diagram ............................................................. 2

Figure 2.

Functional block diagram ............................................................. 3

Figure 3.

Pin out (top view) .................................................................. 4

Figure 4.

Efficiency of Buck2 with Vin = 14 V and Vout = 3.3 V ......................................... 16

Figure 5.

Efficiency of Buck3 with Vin = 3.3 V and Vout = 2 V .......................................... 16

Figure 6.

Efficiency of Buck4 with Vin = 3.3 V and Vout = 1.8 V ........................................ 16

Figure 7.

Efficiency of Boost with Vin = 3.3 V and Vout = 5 V .......................................... 16

Figure 8.

VREG influence on PMIC behavior ..................................................... 18

Figure 9.

Pre regulator BUCK1............................................................... 19

Figure 10.

SYNC IN/OUT in Active mode ........................................................ 24

Figure 11.

SYNCOUT output buffer ............................................................ 24

Figure 12.

Reset circuit diagram in ACTIVE mode .................................................. 25

Figure 13.

Fault function in active mode ......................................................... 26

Figure 14.

Watchdog behavior ................................................................ 27

Figure 15.

Watchdog timing if WD_REC_en = 1 .................................................... 27

Figure 16.

Watchdog timing if WD_REC_en = 0 .................................................... 28

Figure 17.

Watchdog Early, Safe and Late window diagram ............................................ 28

Figure 18.

Output voltage and monitors.......................................................... 29

Figure 19.

Refresh mode in bucks ............................................................. 31

Figure 20.

SPI word representation ............................................................ 32

Figure 21.

SPI diagram ..................................................................... 33

Figure 22.

SPI protocol diagram ............................................................... 33

Figure 23.

Structure of CRC generator .......................................................... 35

Figure 24.

State machine ................................................................... 47

Figure 25.

State machine for SEC UP ........................................................... 50

Figure 26.

OTP program flow chart............................................................. 51

Figure 27.

OTP bit mapping.................................................................. 53

Figure 28.

OTP start-up state check ............................................................ 57

Figure 29.

Power up sequence ............................................................... 62

Figure 30.

Power down sequence ............................................................. 63

Figure 31.

PCB Layout example............................................................... 64

Figure 32.

VFQFPN-48 (7x7x1.0 mm - opt. D) package outline ......................................... 65

Figure 33.

VFQFPN-48 (7x7x1.0) marking information ............................................... 66

L5965

List of figures

DS12567 - Rev 3

page 72/73

L5965 数据表(PDF) 72 Page - STMicroelectronics

L5965 数据表(HTML) 72 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73

数据表下载