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L5965 数据表(PDF) 22 Page - STMicroelectronics

部件名 L5965
功能描述  Power management for automotive vision and radar systems
PDF  73 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L5965 数据表(HTML) 22 Page - STMicroelectronics

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4.2.6
BOOST
The BOOST regulator is a converter running at 2.4 MHz that provides a nominal voltage of 5 V/7 V (selectable via
OTP). Spread Spectrum on PWM is enabled by default and disabled via SPI; a phase shift of 270° versus BUCK1
is internally generated. Soft start time is programmed via SPI. Compensation network is internal.
The BOOST regulator provides the following diagnostic:
Monitor of the output voltage by an independent circuit for UV/OV detection.
Monitor of the Power Good: thresholds status provided via SPI bit.
Over Current Protection.
Over Temperature detection by a local thermal sensor.
PGND5 loss detection.
BOOST fault management:
If a UV/OV fault occurs the FAULT pin is asserted and the fault bit is set in the SPI register, where it can be
read and cleared.
If OT occurs, the power stage is switched OFF with a 16 µs filter time. The output decreases until UV is
detected. The regulator goes in REC state and can restart only when OT flag is reset. The corresponding
SPI bit is set and FAULT pin is asserted.
The over current limitation is a cycle by cycle protection: when the fault happens, the corresponding fault
bit (Buck_OC_STAT) is set in the SPI register. This bit doesn't change the regulator behavior. If the fault
happens for 7 consequent cycles, the FAULT pin is asserted (latched).
If PGND5 ground loss occurs, the BOOST is turned OFF and FAULT pin is asserted. Until the fault is
present and stored any tentative of turning on the regulator is ignored. The BOOST can be turned on again
after the fault removal, and a Read & Clear cycle.
If this regulator is disabled and not used, VBOOST_S and PGND5 pins should be connected to ground.
4.2.7
LDO
LDO is a low drop out linear regulator with 8 programmable output voltages (5.0 V, 3.3 V, 2.8 V, 2.5 V, 1.8 V, 1.3 V,
1.25 V or 1.2 V) through OTP cell. The input voltage (VSLDO) is compatible to main regulator output (up to 5.5 V).
The LDO regulator provides the following diagnostic:
Programmable Over Current limitation in case of over-load or short to ground.
Monitor of the output voltage is monitored by an independent circuit for UV/OV detection.
Over Temperature detection by a local thermal sensor.
LDO Fault management:
In case of OV, the power stage is turned off, the fault SPI bit is set and the FAULT pin is asserted. The
power stage is turned on again when the OV is removed. RESET_B is asserted if enabled by OTP, and it
moves the device to REC state.
In case of UV, the SPI bit is set and the FAULT pin is asserted. RESET_B is asserted, according to OTP
reset activation and power up sequence, and moves the device to REC state.
If OT occurs, the LDO is switched OFF with a 16 µs filter time. The output decreases until UV is detected.
The regulator goes in REC state and can restart only when OT flag is reset. The corresponding SPI bit is
set and FAULT pin is asserted.
4.2.8
VREF
L5965 includes a 1% precise voltage reference output to supply a system ADC. Output voltage can be selected
via OTP cell (4.1 V, 3.3 V, 2.5 V or 1.8 V).
VREF provides the following diagnostic:
Over Current limitation in case of over-load or short to ground.
Monitor of the output voltage by an independent circuit for UV/OV detection.
VREF Fault management:
In case of OV, the power stage is turned off, the fault SPI bit is set and the FAULT pin is asserted. The
power stage is turned on again when the OV is removed.
In case of UV, the fault SPI bit is set and the FAULT pin is asserted.
In case of OC on VREF for 4 ms, the SPI register fault bit is set and VREF turns off. The FAULT pin is
asserted. VREF turns on again when OC is removed.
L5965
Voltage regulators and features description
DS12567 - Rev 3
page 22/73



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