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L5965 数据表(PDF) 35 Page - STMicroelectronics |
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L5965 数据表(HTML) 35 Page - STMicroelectronics |
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35 / 73 page ![]() 1. For DI, CNT=DI[21] is ignored when calculating CRC, it means only {DI[31:22],DI[20:5]} is used to calculate CRC. For example, if DI[31:5]=27‘b1000_0010_1011_1111_1111_1111_111, the CRC[4:0]= 5‘b0_0011 2. For DO, DO[21] is ignored when calculating CRC, it means only {DO[31:22],DO[20:5]} is used to calculate CRC. 3. The initial value of CRC generator is 5'b1_1111. 4. MSB (DI[31]) is shift in CRC generator at first. Figure 23. Structure of CRC generator XOR MOSI BIT4 XOR BIT1 BIT0 BIT3 BIT2 GAPG2402160858PS 5.2 SPI registers mapping When registers are not written, their default state is the one shown in the respective map. 5.2.1 SPI REG BUCK1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 RESERVED R R R R R R/W R/W R R R/W R/W R/W R/W R/W R/W R 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 Address 0x00 BUCK1_CUR_MAX: Driver max output current (see BUCK1 GATE Driver) BUCK1_XTH: OV/UV/PG threshold setting (see Power output UV/OV monitor, Power Good) BUCK1_SPREAD_EN: Spread spectrum enable BUCK1_BLANKTIME: Output power stage blanking time (see tprogramming_dead_BUCK1) BUCK1_SSCLK_SEL: SoftStart time selection (see tSOFTSTART_BUCK1) L5965 SPI registers mapping DS12567 - Rev 3 page 35/73 |
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