L99ASC03 datasheet(71/73 Pages) STMICROELECTRONICS

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L99ASC03

Revision history

01-Aug-2013

(continued)

Section 4.2.1: SDI frame: updated Advanced operation codes

Table 37: Complete device SPI register table:

– Address 0x02, bit 0: updated value

– Address 0x05, bit 1 and bit 0: updated values

– Address 0x11, bit 2: updated value

– Address 0x12, bit 7, bit 6, bit 5, bit 4, bit3 and bit 2: updated

values

– Address 0x16, bit 3: updated value

Section 4.4.1: SPI Control Registers:

– Bits [15], [14], [13], [9] and [8]: updated definitions

– Bit [13]: set as reserved

Section 4.4.2: Device Control Register 1:

– Updated access type

– Bits [4] and [3]: updated definitions

Section 4.4.3: Device Control Register 2:

– Bits [7] and [6]: updated definitions

Section 4.4.4: Device Control Register 3:

– Bits [3] and [2:0]: updated definitions

Section 4.4.5: Device Control Register 4:

– Bits [7:4] and [3:0]: updated definitions

Section 4.4.6: Device Control Register 5:

– Bits [1:0]: set as reserved

Section 4.4.10: Device Status Registers 1:

– Bits [1:0]: updated definition

– Bits [2]: set as reserved

Section 4.4.11: Device Status Registers 2:

– Bits [6:4]: set as reserved

Section 4.4.15: Device Status Registers 6:

– Bit [4]: updated definition

19-Sep-2013

Updated Disclaimer.

Table 39. Document revision history (continued)

Date

Revision

Changes

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