ADE7166 datasheet(125/144 Pages) AD

125 / 144 page

ADE7566/ADE7569/ADE7166/ADE7169

Rev. A | Page 125 of 144

To transmit, the eight data bits must be written into the Serial

Port Buffer SFR (SBUF, 0x99). The ninth bit must be written to

TB8 in the Serial Communications Control Register Bit

Description SFR (SCON, 0x98). When transmission is initiated,

the eight data bits from SBUF are loaded into the transmit shift

into the ninth bit position of the transmit shift register. The

transmission starts at the next valid baud rate clock. The

transmit interrupt flag (TI) is set as soon as the transmission

completes, when the stop bit appears on TxD.

All of the following conditions must be met at the time the final

shift pulse is generated to receive a character:

•

If the extended UART is disabled (EXTEN = 0 in the CFG

SFR), RI must be 0 to receive a character. This ensures that

the data in SBUF is not overwritten if the last received

character has not been read.

•

If multiprocessor communication is enabled by setting

SM2, the received ninth bit must be set to receive a character.

This ensures that only frames with the ninth bit set, frames

that contain addresses, generate a receive interrupt.

If any of these conditions are not met, the received frame is

irretrievably lost, and the receive interrupt flag (RI) is not set.

Reception for Mode 2 is similar to that of Mode 1. The eight

data bytes are input at RxD (LSB first) and loaded onto the

receive shift register. If the received frame has met the previous

criteria, the following events occur:

•

The eight bits in the receive shift register are latched into

the SBUF SFR.

•

The ninth data bit is latched into RB8 in the SCON SFR.

•

The receiver interrupt flag (RI) is set.

Mode 3 (9-Bit UART with Variable Baud Rate)

Mode 3 is selected by setting both SM0 and SM1. In this mode,

the 8052 UART serial port operates in 9-bit mode with a variable

baud rate. The baud rate is set by a timer overflow rate. Timer 1

or Timer 2 can be used to generate baud rates, or both timers

can be used simultaneously where one generates the transmit

rate and the other generates the receive rate. There is also a

dedicated timer for baud rate generation, the UART timer,

which has a fractional divisor to precisely generate any baud

rate (see the UART Timer Generated Baud Rates section). The

operation of the 9-bit UART is the same as for Mode 2, but the

baud rate can be varied.

In all four modes, transmission is initiated by any instruction

that uses SBUF as a destination register. Reception is initiated in

Mode 0 when RI = 0 and REN = 1. Reception is initiated in the

other modes by the incoming start bit if REN = 1.

UART BAUD RATE GENERATION

Mode 0 Baud Rate Generation

The baud rate in Mode 0 is fixed.

⎟

⎠

⎞

⎜

⎝

⎛

CORE

d Rate

Mode 0 Bau

Mode 2 Baud Rate Generation

The baud rate in Mode 2 depends on the value of the PCON.7

(SMOD) bit in the Program Control SFR (PCON, 0x87). If

SMOD = 0, the baud rate is 1/32 of the core clock. If SMOD = 1,

the baud rate is 1/16 of the core clock.

Mode 2 Baud Rate =

SMOD

× fCORE

Mode 1 and Mode 3 Baud Rate Generation

The baud rates in Mode 1 and Mode 3 are determined by the

overflow rate of the timer generating the baud rate, that is,

either Timer 1, Timer 2, or the dedicated baud rate generator,

UART timer, which has an integer and fractional divisor.

Timer 1 Generated Baud Rates

When Timer 1 is used as the baud rate generator, the baud rates

in Mode 1 and Mode 3 are determined by the Timer 1 overflow

rate. The value of SMOD is as follows:

Mode 1 or Mode 3 Baud Rate =

SMOD

Timer 1 Overflow Rate

The Timer 1 interrupt should be disabled in this application.

The timer itself can be configured for either timer or counter

operation, and in any of its three running modes. In the most

typical application, it is configured for timer operation in

autoreload mode (high nibble of TMOD = 0010 binary). In that

case, the baud rate is given by the following formula:

Mode 1 or Mode 3 Baud Rate =

)

256

(

TH1

CORE

SMOD

−

Timer 2 Generated Baud Rates

Baud rates can also be generated by using Timer 2. Using Timer 2

is similar to using Timer 1 in that the timer must overflow 16 times

before a bit is transmitted or received. Because Timer 2 has a

16-bit autoreload mode, a wider range of baud rates is possible.

Mode 1 or Mode 3 Baud Rate =

× Timer 2 Overflow Rate

Therefore, when Timer 2 is used to generate baud rates, the

timer increments every two clock cycles rather than every core

machine cycle as before. It increments six times faster than

Timer 1, and, therefore, baud rates six times faster are possible.

Because Timer 2 has 16-bit autoreload capability, very low baud

rates are still possible.

Timer 2 is selected as the baud rate generator by setting TCLK

and/or RCLK in Timer/Counter 2 Control SFR (T2CON, 0xC8).

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