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STM32F427AI 数据表(PDF) 132 Page - STMicroelectronics |
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STM32F427AI 数据表(HTML) 132 Page - STMicroelectronics |
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132 / 240 page ![]() Electrical characteristics STM32F427xx STM32F429xx 132/240 DS9405 Rev 12 Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore, it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical data corruption (control registers...) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the oscillator pins for 1 second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device is monitored while a simple application, executing EEMBC? code, is running. This emission test is compliant with SAE IEC61967-2 standard, which specifies the test board and the pin loading. Table 52. EMI characteristics for fHSE= 25 MHz and fCPU= 168 MHz Symbol Parameter Conditions Monitored frequency band Max vs. [fHSE/fCPU] Unit 25/168 MHz SEMI Peak(1) VDD = 3.3 V, TA = 25 °C, LQFP176 package, conforming to SAE J1752/3 EEMBC, ART ON, all peripheral clocks enabled, clock dithering disabled. 0.1 to 30 MHz 16 dBµV 30 to 130 MHz 23 130 MHz to 1GHz 25 Level(2) 0.1 MHz to 1GHz 4- Peak(1) VDD = 3.3 V, TA = 25 °C, LQFP176 package, conforming to SAE J1752/3 EEMBC, ART ON, all peripheral clocks enabled, clock dithering enabled 0.1 to 30 MHz 17 dBµV 30 to 130 MHz 8 130 MHz to 1GHz 11 Level(2) 0.1 MHz to 1GHz 3.5 - 1. Refer to chapter “EMI radiated test” in AN1709. 2. Refer to chapter “EMI level classification” in AN1709. |
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