STM32F101X6 datasheet(70/74 Pages) STMICROELECTRONICS

70 / 74 page

Revision history

STM32F101xx

70/74

Revision history

Table 52.

Document revision history

Date

Revision

Changes

06-Jun-2007

First draft.

20-Jul-07

IDD values modified in Table 11: Maximum current consumption in Run

and Sleep modes (TA = 85 °C).

VBAT range modified in Power supply schemes.

VREF+ min value, tSTAB, tlat and fTRIG added to Table 41: ADC

characteristics. Table 37: TIMx characteristics modified.

Note 6 modified and Note 8, Note 4 and Note 7 added below Table 3: Pin

definitions.

Figure 18: Low-speed external clock source AC timing diagram,

Figure 10: Power supply scheme, Figure 22: Recommended NRST pin

protection and Figure 23: I2C bus AC waveforms and measurement

circuit(1) modified.

Sample size modified and machine model removed in Electrostatic

discharge (ESD).

Number of parts modified and standard reference updated in Static latch-

up. 25 °C and 85 °C conditions removed and class name modified in

Table 32: Electrical sensitivities.

tSU(LSE) changed to tSU(LSE) in Table 21: HSE 4-16 MHz oscillator

characteristics.

In Table 28: Flash memory endurance and data retention, typical

endurance added, data retention for TA = 25 °C removed and data

retention for TA = 85 °C added. Note removed below Table 7: General

operating conditions.

VBG changed to VREFINT in Table 10: Embedded internal reference

voltage. IDD max values added to Table 11: Maximum current

consumption in Run and Sleep modes (TA = 85 °C).

IDD(HSI) max value added to Table 23: HSI oscillator characteristics.

RPU and RPD min and max values added to Table 33: I/O static

characteristics. RPU min and max values added to Table 36: NRST pin

characteristics (two notes removed).

Datasheet title corrected. USB characteristics section removed.

Features on page 1 list optimized. Small text changes.

STM32F101X6 数据表(PDF) 70 Page - STMicroelectronics

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