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STM32F101X6 数据表(PDF) 44 Page - STMicroelectronics

部件名 STM32F101X6
功能描述  Access line, advanced ARM-based 32-bit MCU with Flash memory, six 16-bit timers, ADC and seven communication interfaces
PDF  74 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F101X6 数据表(HTML) 44 Page - STMicroelectronics

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Electrical characteristics
STM32F101xx
44/74
Wakeup time from low power mode
The wakeup times given in Table 25 is measured on a wakeup phase with a 8-MHz HSI RC
oscillator. The clock source used to wake up the device depends from the current operating
mode:
Stop or Standby mode: the clock source is the RC oscillator
Sleep mode: the clock source is the clock that was set before entering Sleep mode.
All timings are derived from tests performed under ambient temperature and VDD supply
voltage conditions summarized in Table 7.
5.3.8
PLL characteristics
The parameters given in Table 26 are derived from tests performed under ambient
temperature and VDD supply voltage conditions summarized in Table 7.
Table 25.
Low-power mode wakeup timings
Symbol
Parameter
Conditions
Typ
Unit
tWUSLEEP
(1)
1.
The wakeup times are measured from the wakeup event to the point at which the user application code
reads the first instruction.
Wakeup from Sleep mode
Wakeup on HSI RC clock
1.8
µs
tWUSTOP
(1)
Wakeup from Stop mode
(regulator in run mode)
HSI RC wakeup time = 2 µs
3.6
µs
Wakeup from Stop mode
(regulator in low-power mode)
HSI RC wakeup time = 2 µs,
Regulator wakeup from LP mode
time = 5 µs
5.4
tWUSTDBY
(1)
Wakeup from Standby mode
HSI RC wakeup time = 2 µs,
Regulator wakeup from power down
time = 38 µs
50
µs
Table 26.
PLL characteristics
Symbol
Parameter
Test
conditions
Value
Unit
Min
Typ
Max(1)
1.
Data based on device characterization, not tested in production.
fPLL_IN
PLL input clock
8.0
MHz
PLL input clock duty cycle
40
60
%
fPLL_OUT
PLL multiplier output clock
16
36
MHz
tLOCK
PLL lock time
200
µs



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