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ST7L09 数据表(PDF) 63 Page - STMicroelectronics |
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ST7L09 数据表(HTML) 63 Page - STMicroelectronics |
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63 / 104 page  ST7L05, ST7L09 63/104 SERIAL PERIPHERAL INTERFACE (Cont’d) Table 16. SPI Register Map and Reset Values 11.4 8-BIT A/D CONVERTER (ADC) 11.4.1 Introduction The on-chip Analog to Digital Converter (ADC) pe- ripheral is a 8-bit, successive approximation con- verter with internal sample and hold circuitry. This peripheral has up to five multiplexed analog input channels (refer to device pin out description) that allow the peripheral to convert the analog voltage levels from up to five different sources. The result of the conversion is stored in a 8-bit Data Register. The A/D converter is controlled through a Control/Status Register. 11.4.2 Main Features – 8-bit conversion – Up to 5 channels with multiplexed input – Linear successive approximation – Data register (DR) which contains the results – Conversion complete status flag – On/off bit (to reduce consumption) 11.4.3 Functional Description 11.4.3.1 Analog Power Supply The block diagram is shown in Figure 38. VDD and VSS are the high and low level reference voltage pins. Conversion accuracy may therefore be impacted by voltage drops and noise in the event of heavily loaded or badly decoupled power supply lines. For more details, refer to Section 13 ELECTRICAL CHARACTERISTICS. Figure 38. ADC Block Diagram Address (Hex.) Register Label 76 54321 0 31 SPIDR Reset Value MSB x xxxxx x LSB x 32 SPICR Reset Value SPIE 0 SPE 0 SPR2 0 MSTR 0 CPOL x CPHA x SPR1 x SPR0 x 33 SPICSR Reset Value SPIF 0 WCOL 0 OVR 0 MODF 00 SOD 0 SSM 0 SSI 0 CH2 CH1 0 EOC SPEED ADON 0 CH0 ADCCSR AIN0 AIN1 ANALOG TO DIGITAL CONVERTER AINx ANALOG MUX RADC CADC D2 D1 D3 D7 D6 D5 D4 D0 ADCDR 3 fADC HOLD CONTROL fCPU 0 1 1 0 DIV 2 DIV 4 SLOW bit (ADCCSR2 Register) 7 0 1 |
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