RA4E2 datasheet(6/91 Pages) RENESAS

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1.2

Block Diagram

Figure 1.1 shows a block diagram of the MCU superset. Some individual devices within the group have a subset of the

features.

Memory

128 KB code flash

4 KB data flash

40 KB SRAM

DMA

DMAC × 8

System

Mode control

Power control

protection

MOSC/SOSC

Clocks

(H/M/L) OCO

PLL

GPT16E x 4

Timers

AGT × 2

RTC

Arm Cortex-M33

DTC

CAC

POR/LVD

Reset

ELC

Event link

TRNG

Security

Analog

CRC

Data processing

DOC

Communication interfaces

I3C

SPI × 2

CANFD

USBFS

SCI × 2

TSN

DAC12

ADC12

1 KB Standby

SRAM

Bus

MPU

ICU

WDT

MPU

NVIC

System timer

DBG interface

IDAU

DSP

FPU

CEC

SSIE

IWDT

Note:

Not available on all parts

Figure 1.1

Block diagram

1.3

Part Numbering

Figure 1.2 shows the product part number information, including memory capacity and package type. Table 1.12 shows a

list of products.

RA4E2 Datasheet

1. Overview

R01DS0413EJ0150 Rev.1.50

May 29, 2026

Page 6 of 91

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