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SDA

Timing

parameters

used

0.3 × VDD

0.7 × VDD

= Active Drive by Master

NM_SDA

CM_SDA

NM_SCL

CM_SCL

SCL

tSU_STO

tMMlock

tMMoverlap

tCAS

tSCO

0.3 × VDD

0.7 × VDD

0.3 × VDD

0.7 × VDD

0.3 × VDD

0.7 × VDD

0.3 × VDD

0.7 × VDD

0.3 × VDD

0.7 × VDD

OD or PP

Open-

Drain

OD or PP

Open-

Drain

= Open-Drain class Pull-Up by master

= High-Z by Master

Figure 2.51

I3C timing (open drain timing parameters)

2.3.11

SSIE Timing

Table 2.34

SSIE timing (1 of 2)

(1) High drive output is selected with the Port Drive Capability bit in the PmnPFS register.

(2) Use pins that have a letter appended to their names, for instance “_A”, “_B” or “_C” to indicate group membership. For the SSIE interface,

the AC portion of the electrical characteristics is measured for each group.

Parameter

Symbol

Target specification

Unit

Comments

Min.

Max.

SSIBCK0

Cycle

Master

—

Figure 2.52

Slave

—

High level/ low

level

Master

tHC/tLC

0.35

—

Slave

0.35

—

Rising time/

falling time

Master

tRC/tFC

—

0.15

tO / tI

Slave

—

0.15

tO / tI

RA4E2 Datasheet

2. Electrical Characteristics

R01DS0413EJ0150 Rev.1.50

May 29, 2026

Page 62 of 91

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