ST10F268 datasheet(54/74 Pages) STMICROELECTRONICS

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ST10F168

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20.5.2 - Definition of Internal Timing

The internal operation of the ST10F168 is

controlled by the internal CPU clock fCPU. Both

edges of the CPU clock can trigger internal (e.g.

pipeline) or external (e.g. bus cycles) operations.

The specification of the external timing (AC

Characteristics) therefore depends on the time

between two consecutive edges of the CPU clock,

called “TCL” (see Figure 18).

The CPU clock signal can be generated by

different mechanisms. The duration of TCL and its

variation (and also the derived external timing)

depends on the mechanism used to generate

fCPU. This influence must be regarded when

calculating the timings for the ST10F168.

The example for PLL operation shown in the

Figure 18 refers to a PLL factor of 4.

The mechanism used to generate the CPU clock

is selected during reset by the logic levels on pins

P0.15-13 (P0H.7-5).

20.5.3 - Clock Generation Modes

The Table 23 associates the combinations of these three bit with the respective clock generation mode.

Notes: 1. The external clock input range refers to a CPU clock range of 1...25MHz.

2. The maximum depends on the duty cycle of the external clock signal.

3. The maximum input frequency is 25MHz when using an external crystal with the internal oscillator; providing that internal serial

resistance of the crystal is less than 40

Ω. However, higher frequencies can be applied with an external clock source on pin XTAL1,

but in this case, the input clock signal must reach the defined levels VIL and VIH2.

Figure 18 : Generation Mechanisms for the CPU Clock

Table 23 : CPU Frequency Generation

P0H.7 P0H.6 P0H.5 CPU Frequency fCPU = fXTAL x F External Clock Input Range

Notes

fXTAL x 4

2.5 to 6.25MHz

Default configuration

fXTAL x 3

3.33 to 8.33MHz

fXTAL x 2

5 to 12.5MHz

fXTAL x 5

2 to 5MHz

fXTAL x 1

1 to 25MHz

Direct drive 2

fXTAL x 1.5

6.66 to 16.6MHz

fXTAL / 2

2 to 50MHz

CPU clock via prescaler 3

fXTAL x 2.5

4 to 10MHz

TCL TCL

fCPU

fXTAL

fCPU

fXTAL

Phase locked loop operation

Direct Clock Drive

TCL

fCPU

fXTAL

Prescaler Operation

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