ST7261 datasheet(22/80 Pages) STMICROELECTRONICS

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ST7261

22/80

7 POWER SAVING MODES

7.1 INTRODUCTION

There are three Power Saving modes. Slow Mode

is selected by setting the SMS bits in the Miscella-

neous register. Wait and Halt modes may be en-

tered using the WFI and HALT instructions.

After a RESET the normal operating mode is se-

lected by default (RUN mode). This mode drives

the device (CPU and embedded peripherals) by

means of a master clock which is based on the

main oscillator frequency divided by 3 and multi-

plied by 2 (fCPU).

From Run mode, the different power saving

modes may be selected by setting the relevant

instruction whose action depends on the oscillator

status.

7.1.1 Slow Mode

In Slow mode, the oscillator frequency can be di-

vided by a value defined in the Miscellaneous

this lower frequency. Slow mode is used to reduce

power consumption, and enables the user to adapt

clock frequency to available supply voltage.

7.2 WAIT MODE

WAIT mode places the MCU in a low power con-

sumption mode by stopping the CPU.

This power saving mode is selected by calling the

“WFI” ST7 software instruction.

All peripherals remain active. During WAIT mode,

the I bit of the CC register is forced to 0, to enable

all interrupts. All other registers and memory re-

main unchanged. The MCU remains in WAIT

mode until an interrupt or Reset occurs, whereup-

on the Program Counter branches to the starting

address of the interrupt or Reset service routine.

The MCU will remain in WAIT mode until a Reset

or an Interrupt occurs, causing it to wake up.

Refer to Figure 20.

Figure 20. WAIT Mode Flow Chart

WFI INSTRUCTION

RESET

INTERRUPT

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

CLEARED

OFF

CPU CLOCK

OSCILLATOR

PERIPH. CLOCK

I-BIT

SET

FETCH RESET VECTOR

OR SERVICE INTERRUPT

514 CPU CLOCK

CYCLES DELAY

IF RESET

Note: Before servicing an interrupt, the CC register is

pushed on the stack. The I-Bit is set during the inter-

rupt routine and cleared when the CC register is

popped.

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