ST7261 datasheet(58/80 Pages) STMICROELECTRONICS

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ST7261

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EMC CHARACTERISTICS (Cont’d)

11.7.2 Absolute Electrical Sensitivity

Based on three different tests (ESD, LU and DLU)

using specific measurement methods, the product

is stressed in order to determine its performance in

terms of electrical sensitivity. For more details, re-

fer to the AN1181 ST7 application note.

11.7.2.1 Electro-Static Discharge (ESD)

Electro-Static Discharges (1 positive then 1 nega-

tive pulse separated by 1 second) are applied to

the pins of each sample according to each pin

combination. The sample size depends of the

number of supply pins of the device (3 parts*(n+1)

supply pin). The Human Body Model is simulated.

This test conforms to the JESD22-A114A stand-

ard. See Figure 36 and the following test sequenc-

es.

Human Body Model Test Sequence

– CL is loaded through S1 by the HV pulse gener-

ator.

– S1 switches position from generator to R.

– A discharge from CL through R (body resistance)

to the ST7 occurs.

– S2 must be closed 10 to 100ms after the pulse

delivery period to ensure the ST7 is not left in

charge state. S2 must be opened at least 10ms

prior to the delivery of the next pulse.

11.7.2.2 Designing hardened software to avoid

noise problems

EMC characterization and optimization are per-

formed at component level with a typical applica-

tion environment and simplified MCU software. It

should be noted that good EMC performance is

highly dependent on the user application and the

software in particular.

Therefore it is recommended that the user applies

EMC software optimization and prequalification

tests in relation with the EMC level requested for

his application.

Software recommendations:

The software flowchart must include the manage-

ment of runaway conditions such as:

– Corrupted program counter

– Unexpected reset

– Critical Data corruption (control registers...)

Prequalification trials:

Most of the common failures (unexpected reset

and program counter corruption) can be repro-

duced by manually forcing a low state on the RE-

SET pin or the Oscillator pins for 1 second.

To complete these trials, ESD stress can be ap-

plied directly on the device,over the range of spec-

ification values.When unexpected behaviour is de-

tected, the sofware can be hardened to prevent

unrecoverable errors occurring (see application

note AN1015).

Absolute Maximum Ratings

Figure 36. Typical Equivalent ESD Circuits

Notes:

1. Data based on characterization results, not tested in production.

Symbol

Ratings

Conditions

Maximum value 1) Unit

VESD(HBM)

Electro-static discharge voltage

(Human Body Model)

TA=+25°C

2000

ST7

R=1500

Ω

HIGH VOLTAGE

CL=100pF

PULSE

GENERATOR

HUMAN BODY MODEL

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