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STLC5466 数据表(PDF) 125 Page - STMicroelectronics |
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STLC5466 数据表(HTML) 125 Page - STMicroelectronics |
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125 / 130 page ![]() 125/130 STLC5466 Figure 4-15: 68000 write cycle tx Parameter T min T max Unit t1 Delay NDTACK /NCS0/1 (if t3>t1), (30 pF) Delay when immediate access 0 98 ns ns t2 Hold time Chip Select / NLDS-NUDS 0 ns t3 Delay NDTACK /NLDS-NUDS falling edge (if t1>t3), (30 pF) Delay when immediate access 0 98 ns ns t4 Delay NDTACK /NLDS-NUDS rising edge 20 ns t5 Set up time Address and R/W/last NLDS-NUDS or NCS 0 ns t6 Hold time Address /NLDS-NUDS 0 ns t9 Set up time Data /NLDS-NUDS 0 ns t10 Hold time Data /NLDS-NUDS 7 ns t6 t3 t1 t2 t4 NCS0/1 NDTACK NAS/ALE SIZE0/NLDS SIZE1/NUDS A1/23 R/W / NWR D0/15 A1/23 t9 t10 t5 |
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