PC48F4400PLVB0 datasheet(58/102 Pages) NUMONYX

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Numonyx™ Wireless Flash Memory (W18)

Datasheet

November 2007

Order Number: 290701-18

Numonyx™ Wireless Flash Memory (W18)

10.7

Clear Status Register

The Clear Status Register command clears the Status Register and leaves all partition

output states unchanged. The WSM can set all Status Register bits and clear bits

SR[7:6,2,0]. Because bits SR[5,4,3,1] indicate various error conditions, they can only

be cleared by the Clear Status Register command. By allowing system software to reset

these bits, several operations (such as cumulatively programming several addresses or

erasing multiple blocks in sequence) can be performed before reading the Status

must be cleared before beginning another command or sequence. Device reset (RST#

= VIL) also clears the Status Register. This command functions independently of VPP.

Table 26: Status Register Descriptions

Bit

Name

State

Description

DWS

Device WSM Status

0 = Device WSM is Busy

1 = Device WSM is Ready

SR[7] indicates erase or program completion in the

device. SR[6:1] are invalid while SR[7] = 0. See

Table 27 for valid SR[7] and SR[0] combinations.

ESS

Erase Suspend Status

0 = Erase in progress/completed

1 = Erase suspended

After issuing an Erase Suspend command, the WSM

halts and sets SR[7] and SR[6]. SR[6] remains set

until the device receives an Erase Resume command.

Erase Status

0 = Erase successful

1 = Erase error

SR[5] is set if an attempted erase failed. A Command

Sequence Error is indicated when SR[7,5:4] are set.

Program Status

0 = Program successful

1 = Program error

SR[4] is set if the WSM failed to program a word.

VPPS

VPP Status

0 = VPP OK

1 = VPP low detect, operation aborted

The WSM indicates the VPP level after program or erase

completes. SR[3] does not provide continuous VPP

feedback and isn’t guaranteed when VPP ≠ VPP1/2.

PSS

Program Suspend

Status

0 = Program in progress/completed

1 = Program suspended

After receiving a Program Suspend command, the

WSM halts execution and sets SR[7] and SR[2]. They

remain set until a Resume command is received.

DPS

Device Protect Status

0 = Unlocked

1 = Aborted erase/program attempt on

locked block

If an erase or program operation is attempted to a

locked block (if WP# = VIL), the WSM sets SR[1] and

aborts the operation.

PWS

Partition Write Status

0 = This partition is busy, but only if

SR[7]=0

1 = Another partition is busy, but only

if SR[7]=0

Addressed partition is erasing or programming. In EFP

mode, SR[0] indicates that a data-stream word has

finished programming or verifying depending on the

particular EFP phase. See

Table 27 for valid SR[7]

and SR[0] combinations.

Table 27: Status Register Device WSM and Partition Write Status Description

DWS

(SR[7])

PWS

(SR[0])

Description

The addressed partition is performing a program/erase operation.

EFP: device has finished programming or verifying data, or is ready for data.

A partition other than the one currently addressed is performing a program/erase operation.

EFP: the device is either programming or verifying data.

No program/erase operation is in progress in any partition. Erase and Program suspend bits (SR[6,2])

indicate whether other partitions are suspended.

EFP: the device has exited EFP mode.

Won’t occur in standard program or erase modes.

EFP: this combination does not occur.

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