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PC48F4400PLVB0 数据表(PDF) 64 Page - Numonyx B.V |
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PC48F4400PLVB0 数据表(HTML) 64 Page - Numonyx B.V |
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64 / 102 page ![]() Numonyx™ Wireless Flash Memory (W18) Datasheet November 2007 64 Order Number: 290701-18 Numonyx™ Wireless Flash Memory (W18) Figure 27: Enhanced Factory Program Flowchart EFP Setup EFP Program EFP Verify EFP Exit 1. WA 0 = first Word Address to be programmed within the target block. The BBA (Block Base Address) must remain constant throughout the program phase data stream; WA can be held constant at the first address location, or it can be written to sequence up through the addresses within the block. Writing to a BBA not equal to that of the block currently being written to terminates the EFP program phase, and instructs the device to enter the EFP verify phase. 2. For proper verification to occur, the verify data stream must be presented to the device in the same sequence as that of the program phase data stream. Writing to a BBA not equal to WA terminates the EFP verify phase, and instructs the device to exit EFP . 3. Bits that did not fully program with the single WSM pulse of the EFP program phase receive additional program-pulse attempts during the EFP verify phase. The device will report any program failure by setting SR[4]=1; this check can be performed during the full status check after EFP has been exited for that block, and will indicate any error within the entire data stream. Comments Bus State Repeat for subsequent operations. After EFP exit, a Full Status Check can determine if any program error occurred. See the Full Status Check procedure in the Word Program flowchart. Write Standby Read Write Write (note 2) Read Standby Write Read Standby EFP Setup Program Done? Exit Program Phase Last Data? Exit Verify Phase EFP Exited? Write EFP Confirm Read Standby EFP Setup Done? Read Standby Verify Stream Ready? Write Unlock Block Write (note 1) Standby Last Data? Standby (note 3) Verify Done? Write Data Address = WA 0 Last Data? Write FFFFh Address ≠ BBA Program Done? Read Status Register SR[0]=0=Y Y N Write Data Address = WA 0 Verify Done? Last Data? Read Status Register Write FFFFh Address ≠ BBA Y Verify Stream Ready? Read Status Register SR[7]=0=N Full Status Check Procedure Operation Complete Read Status Register EFP Exited? SR[7]=1=Y SR[0]=1=N Start Write 30h Address = WA 0 V PP = 12V Unlock Block Write D0h Address = WA 0 EFP Setup Done? Read Status Register SR[7]=1=N Exit N EFP Program EFP Verify EFP Exit EFP Setup Comments Bus State Data = 30h Address = WA 0 Data = D0h Address = WA 0 Status Register Check SR[7] 0 = EFP ready 1 = EFP not ready V PP = 12V Unlock block Check SR[0] 0 = Program done 1 = Program not done Status Register Data = FFFFh Address not within same BBA Data = Data to program Address = WA 0 Device automatically increments address. Comments Bus State Data = Word to verify Address = WA 0 Status Register Device automatically increments address. Data = FFFFh Address not within same BBA Status Register Check SR[0] 0 = Ready for verify 1 = Not ready for verify Check SR[0] 0 = Verify done 1 = Verify not done Status Register Check SR[7] 0 = Exit not finished 1 = Exit completed Check V PP & Lock errors (SR[3,1]) Data Stream Ready? Read Status Register SR[0] =0=Y SR[0]=1=N Standby Read Data Stream Ready? Check SR[0] 0 = Ready for data 1 = Not ready for data Status Register SR[0]=0=Y SR[0] =0=Y EFP setup time Standby EFP setup time Standby Error Condition Check If SR[7] = 1: Check SR[3,1] SR[3] = 1 = V PP error SR[1] = 1 = locked block |
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